RDMA/hns: Update some attributes of the RoCE device
authorLijun Ou <oulijun@huawei.com>
Sun, 30 Sep 2018 09:00:33 +0000 (17:00 +0800)
committerJason Gunthorpe <jgg@mellanox.com>
Wed, 3 Oct 2018 22:21:17 +0000 (16:21 -0600)
According to the IB protocol definition, the driver needs to show the
correct device information and the information will be queryed by device
attribute.

Signed-off-by: Lijun Ou <oulijun@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
drivers/infiniband/hw/hns/hns_roce_device.h
drivers/infiniband/hw/hns/hns_roce_hw_v2.c
drivers/infiniband/hw/hns/hns_roce_hw_v2.h
drivers/infiniband/hw/hns/hns_roce_main.c

index b06d3e432f3793d235d82ab9ee3b4015f1ab4607..de9b8e391563d4044cca92c2b8ab83b2664b2b77 100644 (file)
@@ -661,6 +661,7 @@ struct hns_roce_eq_table {
 };
 
 struct hns_roce_caps {
+       u64             fw_ver;
        u8              num_ports;
        int             gid_table_len[HNS_ROCE_MAX_PORTS];
        int             pkey_table_len[HNS_ROCE_MAX_PORTS];
index 3408fc59d417343443e433e507f4a20f671aed65..5c9461defc23d3472ba643da6f98a5487752eb21 100644 (file)
@@ -933,7 +933,24 @@ static int hns_roce_cmq_query_hw_info(struct hns_roce_dev *hr_dev)
 
        resp = (struct hns_roce_query_version *)desc.data;
        hr_dev->hw_rev = le32_to_cpu(resp->rocee_hw_version);
-       hr_dev->vendor_id = le32_to_cpu(resp->rocee_vendor_id);
+       hr_dev->vendor_id = hr_dev->pci_dev->vendor;
+
+       return 0;
+}
+
+static int hns_roce_query_fw_ver(struct hns_roce_dev *hr_dev)
+{
+       struct hns_roce_query_fw_info *resp;
+       struct hns_roce_cmq_desc desc;
+       int ret;
+
+       hns_roce_cmq_setup_basic_desc(&desc, HNS_QUERY_FW_VER, true);
+       ret = hns_roce_cmq_send(hr_dev, &desc, 1);
+       if (ret)
+               return ret;
+
+       resp = (struct hns_roce_query_fw_info *)desc.data;
+       hr_dev->caps.fw_ver = (u64)(le32_to_cpu(resp->fw_ver));
 
        return 0;
 }
@@ -1155,6 +1172,13 @@ static int hns_roce_v2_profile(struct hns_roce_dev *hr_dev)
        int ret;
 
        ret = hns_roce_cmq_query_hw_info(hr_dev);
+       if (ret) {
+               dev_err(hr_dev->dev, "Query hardware version fail, ret = %d.\n",
+                       ret);
+               return ret;
+       }
+
+       ret = hns_roce_query_fw_ver(hr_dev);
        if (ret) {
                dev_err(hr_dev->dev, "Query firmware version fail, ret = %d.\n",
                        ret);
@@ -1183,8 +1207,9 @@ static int hns_roce_v2_profile(struct hns_roce_dev *hr_dev)
                return ret;
        }
 
-       hr_dev->vendor_part_id = 0;
-       hr_dev->sys_image_guid = 0;
+
+       hr_dev->vendor_part_id = hr_dev->pci_dev->device;
+       hr_dev->sys_image_guid = be64_to_cpu(hr_dev->ib_dev.node_guid);
 
        caps->num_qps           = HNS_ROCE_V2_MAX_QP_NUM;
        caps->max_wqes          = HNS_ROCE_V2_MAX_WQE_NUM;
index b921ca6358e09cc1e7ac6663f78c1f54290d4b06..7f39b9431819762be3bac315baddaf65ba205e0f 100644 (file)
@@ -203,6 +203,7 @@ enum {
 
 /* CMQ command */
 enum hns_roce_opcode_type {
+       HNS_QUERY_FW_VER                                = 0x0001,
        HNS_ROCE_OPC_QUERY_HW_VER                       = 0x8000,
        HNS_ROCE_OPC_CFG_GLOBAL_PARAM                   = 0x8001,
        HNS_ROCE_OPC_ALLOC_PF_RES                       = 0x8004,
@@ -1087,6 +1088,11 @@ struct hns_roce_query_version {
        __le32 rsv[5];
 };
 
+struct hns_roce_query_fw_info {
+       __le32 fw_ver;
+       __le32 rsv[5];
+};
+
 struct hns_roce_cfg_llm_a {
        __le32 base_addr_l;
        __le32 base_addr_h;
index 8c5160ec3a4d3edee23f8f7a486e36aff4f80630..7e693b11c823468fc6456eea501ad880cefd14cf 100644 (file)
@@ -196,6 +196,7 @@ static int hns_roce_query_device(struct ib_device *ib_dev,
 
        memset(props, 0, sizeof(*props));
 
+       props->fw_ver = hr_dev->caps.fw_ver;
        props->sys_image_guid = cpu_to_be64(hr_dev->sys_image_guid);
        props->max_mr_size = (u64)(~(0ULL));
        props->page_size_cap = hr_dev->caps.page_size_cap;