ARM64: dts: marvell: armada-cp110: Add registers clock for the crypto node

This extra clock is needed to access the registers of the safexcel EIP97
used on CP110 component of the Armada 7K/8K SoCs.

This follow the changes already made in the binding documentation (as
well as in the driver): "crypto: inside-secure - fix clock resource by
adding a register clock"

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>

diff --git a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
index c491adc90b8ca925ded1d2b25fb89ac4b6c9a84d..b6947fcb8ce6e744800ef5f901842f24ca5a5760 100644 (file)
--- a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
@@ -402,7 +402,9 @@
                                <ICU_GRP_NSR 92 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "mem", "ring0", "ring1",
                                "ring2", "ring3", "eip";
-                       clocks = <&CP110_LABEL(clk) 1 26>;
+                       clock-names = "core", "reg";
+                       clocks = <&CP110_LABEL(clk) 1 26>,
+                                <&CP110_LABEL(clk) 1 17>;
                        dma-coherent;
                };
        };