drm/amdgpu: add ip blocks for picasso (v2)

Add PCO IPs.

V2: enable VCN as well

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 7837f0cc75b28815696e8418420da73d60c4f780..e338ad6d0d200f8d8c4601dcbd318917774be862 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -551,6 +551,24 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
                        amdgpu_device_ip_block_add(adev, &dm_ip_block);
 #else
 #      warning "Enable CONFIG_DRM_AMD_DC for display support on SOC15."
+#endif
+               amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block);
+               amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block);
+               amdgpu_device_ip_block_add(adev, &vcn_v1_0_ip_block);
+               break;
+       case CHIP_PICASSO:
+               amdgpu_device_ip_block_add(adev, &vega10_common_ip_block);
+               amdgpu_device_ip_block_add(adev, &gmc_v9_0_ip_block);
+               amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block);
+               amdgpu_device_ip_block_add(adev, &psp_v10_0_ip_block);
+               amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
+               if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
+                       amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
+#if defined(CONFIG_DRM_AMD_DC)
+               else if (amdgpu_device_has_dc_support(adev))
+                       amdgpu_device_ip_block_add(adev, &dm_ip_block);
+#else
+#      warning "Enable CONFIG_DRM_AMD_DC for display support on SOC15."
 #endif
                amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block);
                amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block);