spi/spi-pxa2xx: add PXA2xx SSP SPI Controller
authorLubomir Rintel <lkundrak@v3.sk>
Wed, 10 Oct 2018 17:09:26 +0000 (19:09 +0200)
committerMark Brown <broonie@kernel.org>
Thu, 11 Oct 2018 14:37:21 +0000 (15:37 +0100)
This is the SPI controller found on Marvel MMP2 and perhaps more
platforms.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Mark Brown <broonie@kernel.org>
Documentation/devicetree/bindings/spi/spi-pxa2xx.txt [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/spi/spi-pxa2xx.txt b/Documentation/devicetree/bindings/spi/spi-pxa2xx.txt
new file mode 100644 (file)
index 0000000..0335a9b
--- /dev/null
@@ -0,0 +1,24 @@
+PXA2xx SSP SPI Controller
+
+Required properties:
+- compatible: Must be "marvell,mmp2-ssp".
+- reg: Offset and length of the device's register set.
+- interrupts: Should be the interrupt number.
+- clocks: Should contain a single entry describing the clock input.
+- #address-cells:  Number of cells required to define a chip select address.
+- #size-cells: Should be zero.
+
+Optional properties:
+- cs-gpios: list of GPIO chip selects. See the SPI bus bindings,
+  Documentation/devicetree/bindings/spi/spi-bus.txt
+
+Child nodes represent devices on the SPI bus
+  See ../spi/spi-bus.txt
+
+Example:
+       ssp1: spi@d4035000 {
+               compatible = "marvell,mmp2-ssp";
+               reg = <0xd4035000 0x1000>;
+               clocks = <&soc_clocks MMP2_CLK_SSP0>;
+               interrupts = <0>;
+       };