Merge branch 'late/clksrc' into late/cleanup

There is no reason to keep the clksrc cleanups separate from the
other cleanups, and this resolves some merge conflicts.

Conflicts:
	arch/arm/mach-spear/spear13xx.c
	drivers/irqchip/Makefile

diff --cc arch/arm/Kconfig
Simple merge

diff --cc arch/arm/boot/dts/Makefile
Simple merge

diff --cc arch/arm/mach-at91/at91sam9261.c
Simple merge

diff --cc arch/arm/mach-at91/at91sam9263.c
Simple merge

diff --cc arch/arm/mach-at91/at91sam9g45.c
Simple merge

diff --cc arch/arm/mach-at91/at91sam9rl.c
Simple merge

diff --cc arch/arm/mach-omap2/board-3430sdp.c
Simple merge

diff --cc arch/arm/mach-omap2/board-am3517evm.c
index 2b9eb3de7aa66ea450d85c51620453a7e77c0038,191f9762ba63c4eb4368b95a862b17228ac5049c..d63f14b534b5b2337ae94091ea3282d20cf07ba7
--- 1/arch/arm/mach-omap2/board-am3517evm.c
--- 2/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@@ -300,8 -362,12 +301,10 @@@ static void __init am3517_evm_init(void
  
        /* Configure GPIO for EHCI port */
        omap_mux_init_gpio(57, OMAP_PIN_OUTPUT);
+ 
+       usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data));
        usbhs_init(&usbhs_bdata);
        am3517_evm_hecc_init(&am3517_evm_hecc_pdata);
 -      /* DSS */
 -      am3517_evm_display_init();
  
        /* RTC - S35390A */
        am3517_evm_rtc_init();

diff --cc arch/arm/mach-omap2/board-cm-t35.c
Simple merge

diff --cc arch/arm/mach-omap2/board-devkit8000.c
Simple merge

diff --cc arch/arm/mach-omap2/board-igep0020.c
Simple merge

diff --cc arch/arm/mach-omap2/board-omap3beagle.c
Simple merge

diff --cc arch/arm/mach-omap2/board-omap3evm.c
Simple merge

diff --cc arch/arm/mach-omap2/board-omap3pandora.c
Simple merge

diff --cc arch/arm/mach-omap2/board-omap3stalker.c
Simple merge

diff --cc arch/arm/mach-omap2/board-overo.c
Simple merge

diff --cc arch/arm/mach-omap2/common.h
Simple merge

diff --cc arch/arm/mach-omap2/omap_hwmod.c
Simple merge

diff --cc arch/arm/mach-omap2/timer.c
index d00d89c93f1ce539591868f2f9307759dcdd30fc,31109cb3f464ab49339542ecabc0f9b5d74cf1db..fdf1c039062ce39761715079db19342aba3662f4
--- 1/arch/arm/mach-omap2/timer.c
--- 2/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@@ -545,22 -545,19 +545,23 @@@ static inline void __init realtime_coun
  #endif
  
  #define OMAP_SYS_GP_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop, \
-                              clksrc_nr, clksrc_src)                   \
+                              clksrc_nr, clksrc_src, clksrc_prop)      \
  void __init omap##name##_gptimer_timer_init(void)                     \
  {                                                                     \
 +      if (omap_clk_init)                                              \
 +              omap_clk_init();                                        \
        omap_dmtimer_init();                                            \
        omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop);    \
-       omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src);        \
+       omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src,         \
+                                       clksrc_prop);                   \
  }
  
  #define OMAP_SYS_32K_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop,        \
-                               clksrc_nr, clksrc_src)                  \
+                               clksrc_nr, clksrc_src, clksrc_prop)     \
  void __init omap##name##_sync32k_timer_init(void)             \
  {                                                                     \
 +      if (omap_clk_init)                                              \
 +              omap_clk_init();                                        \
        omap_dmtimer_init();                                            \
        omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop);    \
        /* Enable the use of clocksource="gp_timer" kernel parameter */ \

diff --cc arch/arm/mach-spear/spear13xx.c
index 3975916666a05afc3776c280dbcac86ac6832536,0000000000000000000000000000000000000000..3621599c38adf023826bc136b335135b19778380
mode 100644,000000..100644
--- 1/arch/arm/mach-spear/spear13xx.c
--- /dev/null
+++ b/arch/arm/mach-spear/spear13xx.c
@@@ -1,126 -1,0 +1,126 @@@
- #include <asm/smp_twd.h>
- #include "generic.h"
 +/*
 + * arch/arm/mach-spear13xx/spear13xx.c
 + *
 + * SPEAr13XX machines common source file
 + *
 + * Copyright (C) 2012 ST Microelectronics
 + * Viresh Kumar <viresh.linux@gmail.com>
 + *
 + * This file is licensed under the terms of the GNU General Public
 + * License version 2. This program is licensed "as is" without any
 + * warranty of any kind, whether express or implied.
 + */
 +
 +#define pr_fmt(fmt) "SPEAr13xx: " fmt
 +
 +#include <linux/amba/pl022.h>
 +#include <linux/clk.h>
++#include <linux/clocksource.h>
 +#include <linux/err.h>
 +#include <linux/of.h>
 +#include <asm/hardware/cache-l2x0.h>
 +#include <asm/mach/map.h>
-       twd_local_timer_of_register();
 +#include <mach/spear.h>
++#include "generic.h"
 +
 +void __init spear13xx_l2x0_init(void)
 +{
 +      /*
 +       * 512KB (64KB/way), 8-way associativity, parity supported
 +       *
 +       * FIXME: 9th bit, of Auxillary Controller register must be set
 +       * for some spear13xx devices for stable L2 operation.
 +       *
 +       * Enable Early BRESP, L2 prefetch for Instruction and Data,
 +       * write alloc and 'Full line of zero' options
 +       *
 +       */
 +
 +      writel_relaxed(0x06, VA_L2CC_BASE + L2X0_PREFETCH_CTRL);
 +
 +      /*
 +       * Program following latencies in order to make
 +       * SPEAr1340 work at 600 MHz
 +       */
 +      writel_relaxed(0x221, VA_L2CC_BASE + L2X0_TAG_LATENCY_CTRL);
 +      writel_relaxed(0x441, VA_L2CC_BASE + L2X0_DATA_LATENCY_CTRL);
 +      l2x0_init(VA_L2CC_BASE, 0x70A60001, 0xfe00ffff);
 +}
 +
 +/*
 + * Following will create 16MB static virtual/physical mappings
 + * PHYSICAL           VIRTUAL
 + * 0xB3000000         0xFE000000
 + * 0xE0000000         0xFD000000
 + * 0xEC000000         0xFC000000
 + * 0xED000000         0xFB000000
 + */
 +struct map_desc spear13xx_io_desc[] __initdata = {
 +      {
 +              .virtual        = (unsigned long)VA_PERIP_GRP2_BASE,
 +              .pfn            = __phys_to_pfn(PERIP_GRP2_BASE),
 +              .length         = SZ_16M,
 +              .type           = MT_DEVICE
 +      }, {
 +              .virtual        = (unsigned long)VA_PERIP_GRP1_BASE,
 +              .pfn            = __phys_to_pfn(PERIP_GRP1_BASE),
 +              .length         = SZ_16M,
 +              .type           = MT_DEVICE
 +      }, {
 +              .virtual        = (unsigned long)VA_A9SM_AND_MPMC_BASE,
 +              .pfn            = __phys_to_pfn(A9SM_AND_MPMC_BASE),
 +              .length         = SZ_16M,
 +              .type           = MT_DEVICE
 +      }, {
 +              .virtual        = (unsigned long)VA_L2CC_BASE,
 +              .pfn            = __phys_to_pfn(L2CC_BASE),
 +              .length         = SZ_4K,
 +              .type           = MT_DEVICE
 +      },
 +};
 +
 +/* This will create static memory mapping for selected devices */
 +void __init spear13xx_map_io(void)
 +{
 +      iotable_init(spear13xx_io_desc, ARRAY_SIZE(spear13xx_io_desc));
 +}
 +
 +static void __init spear13xx_clk_init(void)
 +{
 +      if (of_machine_is_compatible("st,spear1310"))
 +              spear1310_clk_init(VA_MISC_BASE, VA_SPEAR1310_RAS_BASE);
 +      else if (of_machine_is_compatible("st,spear1340"))
 +              spear1340_clk_init(VA_MISC_BASE);
 +      else
 +              pr_err("%s: Unknown machine\n", __func__);
 +}
 +
 +void __init spear13xx_timer_init(void)
 +{
 +      char pclk_name[] = "osc_24m_clk";
 +      struct clk *gpt_clk, *pclk;
 +
 +      spear13xx_clk_init();
 +
 +      /* get the system timer clock */
 +      gpt_clk = clk_get_sys("gpt0", NULL);
 +      if (IS_ERR(gpt_clk)) {
 +              pr_err("%s:couldn't get clk for gpt\n", __func__);
 +              BUG();
 +      }
 +
 +      /* get the suitable parent clock for timer*/
 +      pclk = clk_get(NULL, pclk_name);
 +      if (IS_ERR(pclk)) {
 +              pr_err("%s:couldn't get %s as parent for gpt\n", __func__,
 +                              pclk_name);
 +              BUG();
 +      }
 +
 +      clk_set_parent(gpt_clk, pclk);
 +      clk_put(gpt_clk);
 +      clk_put(pclk);
 +
 +      spear_setup_of_timer();
++      clocksource_of_init();
 +}

diff --cc drivers/clk/spear/spear1340_clock.c
Simple merge

diff --cc drivers/clk/tegra/clk-tegra20.c
Simple merge

diff --cc drivers/irqchip/Makefile
index dae27a77c1e1bf852c04a770abfe4e8af2dcd7d4,acf98953272afa1e967789f5d675fa2770c721eb..154722aa26cbf7c526c001ee1041d16094254fef
--- 1/drivers/irqchip/Makefile
--- 2/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@@ -2,7 -2,7 +2,8 @@@ obj-$(CONFIG_IRQCHIP)                    += irqchip.
  
  obj-$(CONFIG_ARCH_BCM2835)            += irq-bcm2835.o
  obj-$(CONFIG_ARCH_EXYNOS)             += exynos-combiner.o
 +obj-$(CONFIG_ARCH_MVEBU)              += irq-armada-370-xp.o
+ obj-$(CONFIG_ARCH_S3C24XX)            += irq-s3c24xx.o
  obj-$(CONFIG_METAG)                   += irq-metag-ext.o
  obj-$(CONFIG_METAG_PERFCOUNTER_IRQS)  += irq-metag.o
  obj-$(CONFIG_ARCH_SUNXI)              += irq-sunxi.o