[MIPS] Malta: Fix off by one bug in interrupt handler.

Fairly cosmetic as it would only affect VSMP / SMTC kernels that don't
use vectored interrupts.

Found by Beth.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/mips-boards/malta/malta_int.c b/arch/mips/mips-boards/malta/malta_int.c
index 97aeb8c4e6010aae5adbb86c8788f3f5e810f816..b73f21823c5ecc71ee6808d1cd6ec36a117f73a5 100644 (file)
--- a/arch/mips/mips-boards/malta/malta_int.c
+++ b/arch/mips/mips-boards/malta/malta_int.c
@@ -256,7 +256,7 @@ asmlinkage void plat_irq_dispatch(void)
 
        if (irq == MIPSCPU_INT_I8259A)
                malta_hw0_irqdispatch();
-       else if (irq > 0)
+       else if (irq >= 0)
                do_IRQ(MIPS_CPU_IRQ_BASE + irq);
        else
                spurious_interrupt();