drm/i915: Implement the missing bits of assert_panel_unlocked()
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 18 May 2018 15:29:30 +0000 (18:29 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 23 May 2018 14:23:07 +0000 (17:23 +0300)
Add the missing eDP port handling into assert_panel_unlocked(). We now
have intel_dp_port_enabled() which makes this trivial.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180518152931.13104-6-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/intel_display.c

index 7126ddf224f6f600a39d9cf293bafaaf8507fc99..3a0709a6e4a0b3910d6d3ffc6a42c5d41dd148c1 100644 (file)
@@ -1214,9 +1214,23 @@ void assert_panel_unlocked(struct drm_i915_private *dev_priv, enum pipe pipe)
                pp_reg = PP_CONTROL(0);
                port_sel = I915_READ(PP_ON_DELAYS(0)) & PANEL_PORT_SELECT_MASK;
 
-               if (port_sel == PANEL_PORT_SELECT_LVDS)
+               switch (port_sel) {
+               case PANEL_PORT_SELECT_LVDS:
                        intel_lvds_port_enabled(dev_priv, PCH_LVDS, &panel_pipe);
-               /* XXX: else fix for eDP */
+                       break;
+               case PANEL_PORT_SELECT_DPA:
+                       intel_dp_port_enabled(dev_priv, DP_A, PORT_A, &panel_pipe);
+                       break;
+               case PANEL_PORT_SELECT_DPC:
+                       intel_dp_port_enabled(dev_priv, PCH_DP_C, PORT_C, &panel_pipe);
+                       break;
+               case PANEL_PORT_SELECT_DPD:
+                       intel_dp_port_enabled(dev_priv, PCH_DP_D, PORT_D, &panel_pipe);
+                       break;
+               default:
+                       MISSING_CASE(port_sel);
+                       break;
+               }
        } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
                /* presumably write lock depends on pipe, not port select */
                pp_reg = PP_CONTROL(pipe);