drm/nouveau/gr/gf100-: delete duplicated init code
authorBen Skeggs <bskeggs@redhat.com>
Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Fri, 18 May 2018 05:01:23 +0000 (15:01 +1000)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c
drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110.c
drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110b.c
drivers/gpu/drm/nouveau/nvkm/engine/gr/gk208.c
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c
drivers/gpu/drm/nouveau/nvkm/engine/gr/gp100.c
drivers/gpu/drm/nouveau/nvkm/engine/gr/gp102.c
drivers/gpu/drm/nouveau/nvkm/engine/gr/gp107.c
drivers/gpu/drm/nouveau/nvkm/engine/gr/gp10b.c

index 9a57f1a7fb7cc68082a4124de46e6dca7df1fb23..9ed51dc851dfe6c8bd7331ef78d8b3c326066b19 100644 (file)
@@ -172,7 +172,6 @@ void gf100_gr_init_400054(struct gf100_gr *);
 
 void gf117_gr_init_zcull(struct gf100_gr *);
 
-int gk104_gr_init(struct gf100_gr *);
 void gk104_gr_init_vsc_stream_master(struct gf100_gr *);
 void gk104_gr_init_rop_active_fbps(struct gf100_gr *);
 void gk104_gr_init_ppc_exceptions(struct gf100_gr *);
@@ -190,7 +189,6 @@ int gm200_gr_rops(struct gf100_gr *);
 void gm200_gr_init_num_active_ltcs(struct gf100_gr *);
 void gm200_gr_init_ds_hww_esr_2(struct gf100_gr *);
 
-int gp100_gr_init(struct gf100_gr *);
 void gp100_gr_init_rop_active_fbps(struct gf100_gr *);
 void gp100_gr_init_fecs_exceptions(struct gf100_gr *);
 void gp100_gr_init_shader_exceptions(struct gf100_gr *, int, int);
index 36f32e6ef9379a8ad1dcfa2436769386e5f3998b..2e5c48b61ac81375f220c865a90ce49fa22da71e 100644 (file)
@@ -426,82 +426,6 @@ gk104_gr_init_vsc_stream_master(struct gf100_gr *gr)
        nvkm_wr32(device, GPC_UNIT(0, 0x3018), 0x00000001);
 }
 
-int
-gk104_gr_init(struct gf100_gr *gr)
-{
-       struct nvkm_device *device = gr->base.engine.subdev.device;
-       int gpc, tpc, rop;
-
-       gr->func->init_gpc_mmu(gr);
-
-       gf100_gr_mmio(gr, gr->func->mmio);
-       if (gr->func->clkgate_pack)
-               nvkm_therm_clkgate_init(gr->base.engine.subdev.device->therm,
-                                       gr->func->clkgate_pack);
-
-       gr->func->init_vsc_stream_master(gr);
-       gr->func->init_zcull(gr);
-       gr->func->init_num_active_ltcs(gr);
-
-       gr->func->init_rop_active_fbps(gr);
-
-       nvkm_wr32(device, 0x400500, 0x00010001);
-
-       nvkm_wr32(device, 0x400100, 0xffffffff);
-       nvkm_wr32(device, 0x40013c, 0xffffffff);
-       nvkm_wr32(device, 0x400124, 0x00000002);
-
-       gr->func->init_fecs_exceptions(gr);
-       nvkm_wr32(device, 0x404000, 0xc0000000);
-       nvkm_wr32(device, 0x404600, 0xc0000000);
-       nvkm_wr32(device, 0x408030, 0xc0000000);
-       nvkm_wr32(device, 0x404490, 0xc0000000);
-       nvkm_wr32(device, 0x406018, 0xc0000000);
-       gr->func->init_sked_hww_esr(gr);
-       nvkm_wr32(device, 0x405840, 0xc0000000);
-       nvkm_wr32(device, 0x405844, 0x00ffffff);
-       gr->func->init_419cc0(gr);
-       gr->func->init_419eb4(gr);
-
-       gr->func->init_ppc_exceptions(gr);
-
-       for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x0420), 0xc0000000);
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x0900), 0xc0000000);
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x1028), 0xc0000000);
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x0824), 0xc0000000);
-               for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) {
-                       nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x508), 0xffffffff);
-                       nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);
-                       gr->func->init_tex_hww_esr(gr, gpc, tpc);
-                       nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
-                       gr->func->init_shader_exceptions(gr, gpc, tpc);
-               }
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x2c90), 0xffffffff);
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x2c94), 0xffffffff);
-       }
-
-       for (rop = 0; rop < gr->rop_nr; rop++) {
-               nvkm_wr32(device, ROP_UNIT(rop, 0x144), 0x40000000);
-               nvkm_wr32(device, ROP_UNIT(rop, 0x070), 0x40000000);
-               nvkm_wr32(device, ROP_UNIT(rop, 0x204), 0xffffffff);
-               nvkm_wr32(device, ROP_UNIT(rop, 0x208), 0xffffffff);
-       }
-
-       nvkm_wr32(device, 0x400108, 0xffffffff);
-       nvkm_wr32(device, 0x400138, 0xffffffff);
-       nvkm_wr32(device, 0x400118, 0xffffffff);
-       nvkm_wr32(device, 0x400130, 0xffffffff);
-       nvkm_wr32(device, 0x40011c, 0xffffffff);
-       nvkm_wr32(device, 0x400134, 0xffffffff);
-
-       gr->func->init_400054(gr);
-
-       gf100_gr_zbc_init(gr);
-
-       return gf100_gr_init_ctxctl(gr);
-}
-
 #include "fuc/hubgk104.fuc3.h"
 
 static struct gf100_gr_ucode
@@ -524,7 +448,7 @@ gk104_gr_gpccs_ucode = {
 
 static const struct gf100_gr_func
 gk104_gr = {
-       .init = gk104_gr_init,
+       .init = gf100_gr_init,
        .init_gpc_mmu = gf100_gr_init_gpc_mmu,
        .init_vsc_stream_master = gk104_gr_init_vsc_stream_master,
        .init_zcull = gf117_gr_init_zcull,
index 7bcea8181919b0eb5d846c2dc050a6f14bd70019..9adb55f658c6493e9bc48c6b246aff86d762f2e7 100644 (file)
@@ -350,7 +350,7 @@ gk110_gr_init_419eb4(struct gf100_gr *gr)
 
 static const struct gf100_gr_func
 gk110_gr = {
-       .init = gk104_gr_init,
+       .init = gf100_gr_init,
        .init_gpc_mmu = gf100_gr_init_gpc_mmu,
        .init_vsc_stream_master = gk104_gr_init_vsc_stream_master,
        .init_zcull = gf117_gr_init_zcull,
index 5af2a54e60bc0e2c4d74b313611d5f8e5c1f46ce..f848f1578cd3ea1b2c64db979a364239957003ee 100644 (file)
@@ -102,7 +102,7 @@ gk110b_gr_pack_mmio[] = {
 
 static const struct gf100_gr_func
 gk110b_gr = {
-       .init = gk104_gr_init,
+       .init = gf100_gr_init,
        .init_gpc_mmu = gf100_gr_init_gpc_mmu,
        .init_vsc_stream_master = gk104_gr_init_vsc_stream_master,
        .init_zcull = gf117_gr_init_zcull,
index dd08373a96b56cb9f622bf325425db391e9e3f68..9c678f17b2fe008cec707aa92313dd610e0e474f 100644 (file)
@@ -161,7 +161,7 @@ gk208_gr_gpccs_ucode = {
 
 static const struct gf100_gr_func
 gk208_gr = {
-       .init = gk104_gr_init,
+       .init = gf100_gr_init,
        .init_gpc_mmu = gf100_gr_init_gpc_mmu,
        .init_vsc_stream_master = gk104_gr_init_vsc_stream_master,
        .init_zcull = gf117_gr_init_zcull,
index 4680d99b59ba139823154600c51bf65d59da6e31..c598fa5a68e036104b9f281411330ffcfb8a9b0d 100644 (file)
@@ -369,81 +369,6 @@ gm107_gr_init_gpc_mmu(struct gf100_gr *gr)
        nvkm_wr32(device, GPC_BCAST(0x08b8), nvkm_memory_addr(fb->mmu_rd) >> 8);
 }
 
-static int
-gm107_gr_init(struct gf100_gr *gr)
-{
-       struct nvkm_device *device = gr->base.engine.subdev.device;
-       int gpc, tpc, rop;
-
-       gr->func->init_gpc_mmu(gr);
-
-       gf100_gr_mmio(gr, gr->func->mmio);
-
-       gr->func->init_bios(gr);
-
-       gr->func->init_vsc_stream_master(gr);
-       gr->func->init_zcull(gr);
-       gr->func->init_num_active_ltcs(gr);
-
-       gr->func->init_rop_active_fbps(gr);
-
-       nvkm_wr32(device, 0x400500, 0x00010001);
-
-       nvkm_wr32(device, 0x400100, 0xffffffff);
-       nvkm_wr32(device, 0x40013c, 0xffffffff);
-       nvkm_wr32(device, 0x400124, 0x00000002);
-       gr->func->init_fecs_exceptions(gr);
-
-       nvkm_wr32(device, 0x404000, 0xc0000000);
-       nvkm_wr32(device, 0x404600, 0xc0000000);
-       nvkm_wr32(device, 0x408030, 0xc0000000);
-       nvkm_wr32(device, 0x404490, 0xc0000000);
-       nvkm_wr32(device, 0x406018, 0xc0000000);
-       gr->func->init_sked_hww_esr(gr);
-       nvkm_wr32(device, 0x405840, 0xc0000000);
-       nvkm_wr32(device, 0x405844, 0x00ffffff);
-       gr->func->init_419cc0(gr);
-
-       gr->func->init_ppc_exceptions(gr);
-
-       for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x0420), 0xc0000000);
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x0900), 0xc0000000);
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x1028), 0xc0000000);
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x0824), 0xc0000000);
-               for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) {
-                       nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x508), 0xffffffff);
-                       nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);
-                       gr->func->init_tex_hww_esr(gr, gpc, tpc);
-                       nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
-                       gr->func->init_504430(gr, gpc, tpc);
-                       gr->func->init_shader_exceptions(gr, gpc, tpc);
-               }
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x2c90), 0xffffffff);
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x2c94), 0xffffffff);
-       }
-
-       for (rop = 0; rop < gr->rop_nr; rop++) {
-               nvkm_wr32(device, ROP_UNIT(rop, 0x144), 0x40000000);
-               nvkm_wr32(device, ROP_UNIT(rop, 0x070), 0x40000000);
-               nvkm_wr32(device, ROP_UNIT(rop, 0x204), 0xffffffff);
-               nvkm_wr32(device, ROP_UNIT(rop, 0x208), 0xffffffff);
-       }
-
-       nvkm_wr32(device, 0x400108, 0xffffffff);
-       nvkm_wr32(device, 0x400138, 0xffffffff);
-       nvkm_wr32(device, 0x400118, 0xffffffff);
-       nvkm_wr32(device, 0x400130, 0xffffffff);
-       nvkm_wr32(device, 0x40011c, 0xffffffff);
-       nvkm_wr32(device, 0x400134, 0xffffffff);
-
-       gr->func->init_400054(gr);
-
-       gf100_gr_zbc_init(gr);
-
-       return gf100_gr_init_ctxctl(gr);
-}
-
 #include "fuc/hubgm107.fuc5.h"
 
 static struct gf100_gr_ucode
@@ -466,7 +391,7 @@ gm107_gr_gpccs_ucode = {
 
 static const struct gf100_gr_func
 gm107_gr = {
-       .init = gm107_gr_init,
+       .init = gf100_gr_init,
        .init_gpc_mmu = gm107_gr_init_gpc_mmu,
        .init_bios = gm107_gr_init_bios,
        .init_vsc_stream_master = gk104_gr_init_vsc_stream_master,
index bbe18873aee2fa25860ebc978fa41bc433bd12b1..4dcb56bfbca1f33a09fa56651854e23f324b9242 100644 (file)
@@ -77,80 +77,6 @@ gm200_gr_init_rop_active_fbps(struct gf100_gr *gr)
        nvkm_mask(device, 0x408958, 0x0000000f, fbp_count); /* crop */
 }
 
-static int
-gm200_gr_init(struct gf100_gr *gr)
-{
-       struct nvkm_device *device = gr->base.engine.subdev.device;
-       int gpc, tpc, rop;
-
-       gr->func->init_gpc_mmu(gr);
-
-       gf100_gr_mmio(gr, gr->fuc_sw_nonctx);
-
-       gr->func->init_bios(gr);
-
-       gr->func->init_vsc_stream_master(gr);
-       gr->func->init_zcull(gr);
-       gr->func->init_num_active_ltcs(gr);
-
-       gr->func->init_rop_active_fbps(gr);
-
-       nvkm_wr32(device, 0x400500, 0x00010001);
-       nvkm_wr32(device, 0x400100, 0xffffffff);
-       nvkm_wr32(device, 0x40013c, 0xffffffff);
-       nvkm_wr32(device, 0x400124, 0x00000002);
-       gr->func->init_fecs_exceptions(gr);
-       gr->func->init_ds_hww_esr_2(gr);
-       nvkm_wr32(device, 0x404000, 0xc0000000);
-       nvkm_wr32(device, 0x404600, 0xc0000000);
-       nvkm_wr32(device, 0x408030, 0xc0000000);
-       nvkm_wr32(device, 0x404490, 0xc0000000);
-       nvkm_wr32(device, 0x406018, 0xc0000000);
-       gr->func->init_sked_hww_esr(gr);
-       nvkm_wr32(device, 0x405840, 0xc0000000);
-       nvkm_wr32(device, 0x405844, 0x00ffffff);
-       gr->func->init_419cc0(gr);
-
-       gr->func->init_ppc_exceptions(gr);
-
-       for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x0420), 0xc0000000);
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x0900), 0xc0000000);
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x1028), 0xc0000000);
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x0824), 0xc0000000);
-               for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) {
-                       nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x508), 0xffffffff);
-                       nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);
-                       gr->func->init_tex_hww_esr(gr, gpc, tpc);
-                       nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
-                       gr->func->init_504430(gr, gpc, tpc);
-                       gr->func->init_shader_exceptions(gr, gpc, tpc);
-               }
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x2c90), 0xffffffff);
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x2c94), 0xffffffff);
-       }
-
-       for (rop = 0; rop < gr->rop_nr; rop++) {
-               nvkm_wr32(device, ROP_UNIT(rop, 0x144), 0x40000000);
-               nvkm_wr32(device, ROP_UNIT(rop, 0x070), 0x40000000);
-               nvkm_wr32(device, ROP_UNIT(rop, 0x204), 0xffffffff);
-               nvkm_wr32(device, ROP_UNIT(rop, 0x208), 0xffffffff);
-       }
-
-       nvkm_wr32(device, 0x400108, 0xffffffff);
-       nvkm_wr32(device, 0x400138, 0xffffffff);
-       nvkm_wr32(device, 0x400118, 0xffffffff);
-       nvkm_wr32(device, 0x400130, 0xffffffff);
-       nvkm_wr32(device, 0x40011c, 0xffffffff);
-       nvkm_wr32(device, 0x400134, 0xffffffff);
-
-       gr->func->init_400054(gr);
-
-       gf100_gr_zbc_init(gr);
-
-       return gf100_gr_init_ctxctl(gr);
-}
-
 int
 gm200_gr_new_(const struct gf100_gr_func *func, struct nvkm_device *device,
              int index, struct nvkm_gr **pgr)
@@ -191,7 +117,7 @@ gm200_gr_new_(const struct gf100_gr_func *func, struct nvkm_device *device,
 
 static const struct gf100_gr_func
 gm200_gr = {
-       .init = gm200_gr_init,
+       .init = gf100_gr_init,
        .init_gpc_mmu = gm200_gr_init_gpc_mmu,
        .init_bios = gm107_gr_init_bios,
        .init_vsc_stream_master = gk104_gr_init_vsc_stream_master,
index 48a0e144d98385cb96929fc7af7f115d62c8ef01..cc507e83051157640744e22c7188069dae750aa1 100644 (file)
@@ -62,84 +62,9 @@ gp100_gr_init_rop_active_fbps(struct gf100_gr *gr)
        nvkm_mask(device, 0x408958, 0x0000000f, fbp_count); /* crop */
 }
 
-int
-gp100_gr_init(struct gf100_gr *gr)
-{
-       struct nvkm_device *device = gr->base.engine.subdev.device;
-       int gpc, tpc, rop;
-
-       gr->func->init_gpc_mmu(gr);
-
-       gf100_gr_mmio(gr, gr->fuc_sw_nonctx);
-
-       gr->func->init_vsc_stream_master(gr);
-       gr->func->init_zcull(gr);
-
-       gr->func->init_num_active_ltcs(gr);
-
-       gr->func->init_rop_active_fbps(gr);
-       if (gr->func->init_swdx_pes_mask)
-               gr->func->init_swdx_pes_mask(gr);
-
-       nvkm_wr32(device, 0x400500, 0x00010001);
-       nvkm_wr32(device, 0x400100, 0xffffffff);
-       nvkm_wr32(device, 0x40013c, 0xffffffff);
-       nvkm_wr32(device, 0x400124, 0x00000002);
-       gr->func->init_fecs_exceptions(gr);
-       gr->func->init_ds_hww_esr_2(gr);
-       nvkm_wr32(device, 0x404000, 0xc0000000);
-       nvkm_wr32(device, 0x404600, 0xc0000000);
-       nvkm_wr32(device, 0x408030, 0xc0000000);
-       nvkm_wr32(device, 0x404490, 0xc0000000);
-       nvkm_wr32(device, 0x406018, 0xc0000000);
-       gr->func->init_sked_hww_esr(gr);
-       nvkm_wr32(device, 0x405840, 0xc0000000);
-       nvkm_wr32(device, 0x405844, 0x00ffffff);
-       gr->func->init_419cc0(gr);
-       if (gr->func->init_419c9c)
-               gr->func->init_419c9c(gr);
-
-       gr->func->init_ppc_exceptions(gr);
-
-       for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x0420), 0xc0000000);
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x0900), 0xc0000000);
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x1028), 0xc0000000);
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x0824), 0xc0000000);
-               for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) {
-                       nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x508), 0xffffffff);
-                       nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);
-                       gr->func->init_tex_hww_esr(gr, gpc, tpc);
-                       nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
-                       gr->func->init_504430(gr, gpc, gpc);
-                       gr->func->init_shader_exceptions(gr, gpc, tpc);
-               }
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x2c90), 0xffffffff);
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x2c94), 0xffffffff);
-       }
-
-       for (rop = 0; rop < gr->rop_nr; rop++) {
-               nvkm_wr32(device, ROP_UNIT(rop, 0x144), 0x40000000);
-               nvkm_wr32(device, ROP_UNIT(rop, 0x070), 0x40000000);
-               nvkm_wr32(device, ROP_UNIT(rop, 0x204), 0xffffffff);
-               nvkm_wr32(device, ROP_UNIT(rop, 0x208), 0xffffffff);
-       }
-
-       nvkm_wr32(device, 0x400108, 0xffffffff);
-       nvkm_wr32(device, 0x400138, 0xffffffff);
-       nvkm_wr32(device, 0x400118, 0xffffffff);
-       nvkm_wr32(device, 0x400130, 0xffffffff);
-       nvkm_wr32(device, 0x40011c, 0xffffffff);
-       nvkm_wr32(device, 0x400134, 0xffffffff);
-
-       gf100_gr_zbc_init(gr);
-
-       return gf100_gr_init_ctxctl(gr);
-}
-
 static const struct gf100_gr_func
 gp100_gr = {
-       .init = gp100_gr_init,
+       .init = gf100_gr_init,
        .init_gpc_mmu = gm200_gr_init_gpc_mmu,
        .init_vsc_stream_master = gk104_gr_init_vsc_stream_master,
        .init_zcull = gf117_gr_init_zcull,
index 7ce06520fdc9935a5e2397ec11e195e50c824f33..86d1ff777d67494c640561fd06768521a01199c4 100644 (file)
@@ -42,7 +42,7 @@ gp102_gr_init_swdx_pes_mask(struct gf100_gr *gr)
 
 static const struct gf100_gr_func
 gp102_gr = {
-       .init = gp100_gr_init,
+       .init = gf100_gr_init,
        .init_gpc_mmu = gm200_gr_init_gpc_mmu,
        .init_vsc_stream_master = gk104_gr_init_vsc_stream_master,
        .init_zcull = gf117_gr_init_zcull,
index dbb2d4e71442de977ffa9770449cee55b23a8e47..14007b5d2e41d2fea6a9aca32525c2fd303bfbc5 100644 (file)
@@ -28,7 +28,7 @@
 
 static const struct gf100_gr_func
 gp107_gr = {
-       .init = gp100_gr_init,
+       .init = gf100_gr_init,
        .init_gpc_mmu = gm200_gr_init_gpc_mmu,
        .init_vsc_stream_master = gk104_gr_init_vsc_stream_master,
        .init_zcull = gf117_gr_init_zcull,
index 7f23d8bd977fee47235a2c52dbde723ab2337958..450a96d1cd07271f9c4dae8833e7cf9e6082db14 100644 (file)
@@ -27,7 +27,7 @@
 
 static const struct gf100_gr_func
 gp10b_gr = {
-       .init = gp100_gr_init,
+       .init = gf100_gr_init,
        .init_gpc_mmu = gm200_gr_init_gpc_mmu,
        .init_vsc_stream_master = gk104_gr_init_vsc_stream_master,
        .init_zcull = gf117_gr_init_zcull,