drm/i915: dual link pipe selection for bxt
authorDeepak M <m.deepak@intel.com>
Wed, 9 Dec 2015 14:44:04 +0000 (20:14 +0530)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 11 Dec 2015 16:28:24 +0000 (17:28 +0100)
Pipe is assigned based on the port, but it should be
based on current crtc. Correcting the same in this patch.

v2: Use macro BXT_PIPE_SELECT(pipe) (Daniel)

Signed-off-by: Deepak M <m.deepak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_dsi.c

index ef16c4236d9fcaafbffd28d852fb338bba5c1a2a..7510d508e3735f09e4ed860106031ee01497f83f 100644 (file)
@@ -8102,9 +8102,7 @@ enum skl_disp_power_wells {
 #define  RGB_FLIP_TO_BGR                               (1 << 2)
 
 #define  BXT_PIPE_SELECT_MASK                          (7 << 7)
-#define  BXT_PIPE_SELECT_C                             (2 << 7)
-#define  BXT_PIPE_SELECT_B                             (1 << 7)
-#define  BXT_PIPE_SELECT_A                             (0 << 7)
+#define  BXT_PIPE_SELECT(pipe)                         ((pipe) << 7)
 
 #define _MIPIA_DATA_ADDRESS            (dev_priv->mipi_mmio_base + 0xb108)
 #define _MIPIC_DATA_ADDRESS            (dev_priv->mipi_mmio_base + 0xb908)
index 25bdf1cbb5f97aec5165fac68c38fbdc9e7c1f3b..4ab168dd36bf9fd72fa0d8f9a2d32e81c9ff0402 100644 (file)
@@ -885,21 +885,12 @@ static void intel_dsi_prepare(struct intel_encoder *intel_encoder)
                        I915_WRITE(MIPI_CTRL(port), tmp |
                                        READ_REQUEST_PRIORITY_HIGH);
                } else if (IS_BROXTON(dev)) {
-                       /*
-                        * FIXME:
-                        * BXT can connect any PIPE to any MIPI port.
-                        * Select the pipe based on the MIPI port read from
-                        * VBT for now. Pick PIPE A for MIPI port A and C
-                        * for port C.
-                        */
+                       enum pipe pipe = intel_crtc->pipe;
+
                        tmp = I915_READ(MIPI_CTRL(port));
                        tmp &= ~BXT_PIPE_SELECT_MASK;
 
-                       if (port == PORT_A)
-                               tmp |= BXT_PIPE_SELECT_A;
-                       else if (port == PORT_C)
-                               tmp |= BXT_PIPE_SELECT_C;
-
+                       tmp |= BXT_PIPE_SELECT(pipe);
                        I915_WRITE(MIPI_CTRL(port), tmp);
                }