MIPS: ath79: add WMAC registration code for AR934X

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3513/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/ath79/Kconfig b/arch/mips/ath79/Kconfig
index 7db8e8903a7bbb2e0337f7b565e796b9fd3551e1..5fa3d7b2b7168b13f52cbeedf4926bdbd0a10813 100644 (file)
--- a/arch/mips/ath79/Kconfig
+++ b/arch/mips/ath79/Kconfig
@@ -86,7 +86,7 @@ config ATH79_DEV_USB
        def_bool n
 
 config ATH79_DEV_WMAC
-       depends on (SOC_AR913X || SOC_AR933X)
+       depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X)
        def_bool n
 
 endif

diff --git a/arch/mips/ath79/dev-wmac.c b/arch/mips/ath79/dev-wmac.c
index 9c717bf98ffe629f9f9c4061bd49b9114a9a99f5..d6d893c16ad405f6e48aee6f2ef088c36877a8be 100644 (file)
--- a/arch/mips/ath79/dev-wmac.c
+++ b/arch/mips/ath79/dev-wmac.c
@@ -1,9 +1,12 @@
 /*
  *  Atheros AR913X/AR933X SoC built-in WMAC device support
  *
+ *  Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
  *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
  *
+ *  Parts of this file are based on Atheros 2.6.15/2.6.31 BSP
+ *
  *  This program is free software; you can redistribute it and/or modify it
  *  under the terms of the GNU General Public License version 2 as published
  *  by the Free Software Foundation.
@@ -26,8 +29,7 @@ static struct resource ath79_wmac_resources[] = {
                /* .start and .end fields are filled dynamically */
                .flags  = IORESOURCE_MEM,
        }, {
-               .start  = ATH79_CPU_IRQ_IP2,
-               .end    = ATH79_CPU_IRQ_IP2,
+               /* .start and .end fields are filled dynamically */
                .flags  = IORESOURCE_IRQ,
        },
 };
@@ -53,6 +55,8 @@ static void __init ar913x_wmac_setup(void)
 
        ath79_wmac_resources[0].start = AR913X_WMAC_BASE;
        ath79_wmac_resources[0].end = AR913X_WMAC_BASE + AR913X_WMAC_SIZE - 1;
+       ath79_wmac_resources[1].start = ATH79_CPU_IRQ_IP2;
+       ath79_wmac_resources[1].end = ATH79_CPU_IRQ_IP2;
 }
 
 
@@ -79,6 +83,8 @@ static void __init ar933x_wmac_setup(void)
 
        ath79_wmac_resources[0].start = AR933X_WMAC_BASE;
        ath79_wmac_resources[0].end = AR933X_WMAC_BASE + AR933X_WMAC_SIZE - 1;
+       ath79_wmac_resources[1].start = ATH79_CPU_IRQ_IP2;
+       ath79_wmac_resources[1].end = ATH79_CPU_IRQ_IP2;
 
        t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
        if (t & AR933X_BOOTSTRAP_REF_CLK_40)
@@ -92,12 +98,32 @@ static void __init ar933x_wmac_setup(void)
        ath79_wmac_data.external_reset = ar933x_wmac_reset;
 }
 
+static void ar934x_wmac_setup(void)
+{
+       u32 t;
+
+       ath79_wmac_device.name = "ar934x_wmac";
+
+       ath79_wmac_resources[0].start = AR934X_WMAC_BASE;
+       ath79_wmac_resources[0].end = AR934X_WMAC_BASE + AR934X_WMAC_SIZE - 1;
+       ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1);
+       ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1);
+
+       t = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
+       if (t & AR934X_BOOTSTRAP_REF_CLK_40)
+               ath79_wmac_data.is_clk_25mhz = false;
+       else
+               ath79_wmac_data.is_clk_25mhz = true;
+}
+
 void __init ath79_register_wmac(u8 *cal_data)
 {
        if (soc_is_ar913x())
                ar913x_wmac_setup();
        else if (soc_is_ar933x())
                ar933x_wmac_setup();
+       else if (soc_is_ar934x())
+               ar934x_wmac_setup();
        else
                BUG();
 

diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
index 32abbf984a997da2b234070cbcc809f52a37070c..1caa78ad06d5833306ee367cd44fbefe5dbd6fe3 100644 (file)
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -61,6 +61,9 @@
 #define AR933X_EHCI_BASE       0x1b000000
 #define AR933X_EHCI_SIZE       0x1000
 
+#define AR934X_WMAC_BASE       (AR71XX_APB_BASE + 0x00100000)
+#define AR934X_WMAC_SIZE       0x20000
+
 /*
  * DDR_CTRL block
  */