// SPDX-License-Identifier: GPL-2.0-only
// Device Tree Source for Meraki Go GX20 (Fairyfly)
-#include "qcom-ipq4029-wired-qca-common.dtsi"
+#include "qcom-ipq4029-meraki-insect.dtsi"
/ {
model = "Meraki Go GX20 Router";
compatible = "meraki,gx20";
+ soc {
+ ess_tcsr@1953000 {
+ qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+ };
+
+ tcsr@194b000 {
+ /* select hostmode */
+ compatible = "qcom,tcsr";
+ reg = <0x194b000 0x100>;
+ qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+ status = "okay";
+ };
+ };
+
leds {
compatible = "gpio-leds";
};
};
-/* GX20 does not have WiFi radios */
-&wifi0 {
- status = "disabled";
+&tricolor {
+ enable-gpio = <&tlmm 48 GPIO_ACTIVE_HIGH>;
+};
+
+&usb2_hs_phy {
+ status = "okay";
+};
+
+&usb2 {
+ status = "okay";
+};
+
+&usb3_hs_phy {
+ status = "okay";
+};
+
+&usb3_ss_phy {
+ status = "okay";
+};
+
+&usb3 {
+ status = "okay";
+};
+
+&swport1 {
+ label = "wan";
+ status = "okay";
+};
+
+&swport2 {
+ label = "lan2";
+ status = "okay";
+};
+
+&swport3 {
+ label = "lan3";
+ status = "okay";
+};
+
+&swport4 {
+ label = "lan4";
+ status = "okay";
};
-&wifi1 {
- status = "disabled";
+&swport5 {
+ label = "lan5";
+ status = "okay";
};
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Device Tree Source for Meraki "Insect" series
- *
- * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
- * Copyright (C) 2017 Christian Lamparter <chunkeey@googlemail.com>
- *
- * Based on Cisco Meraki DTS from GPL release r25-linux-3.14-20170427
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without
- * any warranty of any kind, whether express or implied.
- */
-
-#include "qcom-ipq4019.dtsi"
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/soc/qcom,tcsr.h>
-#include <dt-bindings/leds/common.h>
-
-/ {
- aliases {
- // TODO: Verify if the ethernet0 alias is needed
- ethernet0 = &gmac;
- led-boot = &status_green;
- led-failsafe = &status_red;
- led-running = &status_green;
- led-upgrade = &power_orange;
- };
-
- /* Do we really need this defined? */
- memory {
- device_type = "memory";
- reg = <0x80000000 0x10000000>;
- };
-
- soc {
- /* It is a 56-bit counter that supplies the count to the ARM arch
- timers and without upstream driver */
- counter@4a1000 {
- compatible = "qcom,qca-gcnt";
- reg = <0x4a1000 0x4>;
- };
-
- ess_tcsr@1953000 {
- compatible = "qcom,tcsr";
- reg = <0x1953000 0x1000>;
- qcom,ess-interface-select = <TCSR_ESS_PSGMII_RGMII5>;
- };
-
- tcsr@1949000 {
- compatible = "qcom,tcsr";
- reg = <0x1949000 0x100>;
- qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
- };
-
- tcsr@1957000 {
- compatible = "qcom,tcsr";
- reg = <0x1957000 0x100>;
- qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
- };
- };
-
- keys {
- compatible = "gpio-keys";
-
- reset {
- label = "reset";
- gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_RESTART>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_orange: power {
- function = LED_FUNCTION_POWER;
- color = <LED_COLOR_ID_ORANGE>;
- gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
- panic-indicator;
- };
- };
-};
-
-&watchdog {
- status = "okay";
-};
-
-&prng {
- status = "okay";
-};
-
-&crypto {
- status = "okay";
-};
-
-&blsp_dma {
- status = "okay";
-};
-
-&blsp1_uart1 {
- pinctrl-0 = <&serial_0_pins>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&blsp1_uart2 {
- pinctrl-0 = <&serial_1_pins>;
- pinctrl-names = "default";
- status = "okay";
-
- bluetooth {
- compatible = "ti,cc2650";
- enable-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
- };
-};
-
-&cryptobam {
- status = "okay";
-};
-
-&blsp1_i2c3 {
- pinctrl-0 = <&i2c_0_pins>;
- pinctrl-names = "default";
- status = "okay";
-
- eeprom@50 {
- compatible = "atmel,24c64";
- pagesize = <32>;
- reg = <0x50>;
- read-only; /* This holds our MAC & Meraki board-data */
-
- nvmem-layout {
- compatible = "fixed-layout";
- #address-cells = <1>;
- #size-cells = <1>;
-
- mac_address: mac-address@66 {
- compatible = "mac-base";
- reg = <0x66 0x6>;
- #nvmem-cell-cells = <1>;
- };
- };
- };
-};
-
-&blsp1_i2c4 {
- pinctrl-0 = <&i2c_1_pins>;
- pinctrl-names = "default";
- status = "okay";
-
- tricolor: led-controller@30 {
- compatible = "ti,lp5562";
- reg = <0x30>;
- clock-mode = /bits/8 <2>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* RGB led */
- status_red: chan@0 {
- chan-name = "red:status";
- led-cur = /bits/ 8 <0x20>;
- max-cur = /bits/ 8 <0x60>;
- reg = <0>;
- color = <LED_COLOR_ID_RED>;
- };
-
- status_green: chan@1 {
- chan-name = "green:status";
- led-cur = /bits/ 8 <0x20>;
- max-cur = /bits/ 8 <0x60>;
- reg = <1>;
- color = <LED_COLOR_ID_GREEN>;
- };
-
- chan@2 {
- chan-name = "blue:status";
- led-cur = /bits/ 8 <0x20>;
- max-cur = /bits/ 8 <0x60>;
- reg = <2>;
- color = <LED_COLOR_ID_BLUE>;
- };
-
- chan@3 {
- chan-name = "white:status";
- led-cur = /bits/ 8 <0x20>;
- max-cur = /bits/ 8 <0x60>;
- reg = <3>;
- color = <LED_COLOR_ID_WHITE>;
- };
- };
-};
-
-&nand {
- pinctrl-0 = <&nand_pins>;
- pinctrl-names = "default";
- status = "okay";
-
- nand@0 {
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition@0 {
- label = "sbl1";
- reg = <0x00000000 0x00100000>;
- read-only;
- };
- partition@100000 {
- label = "mibib";
- reg = <0x00100000 0x00100000>;
- read-only;
- };
- partition@200000 {
- label = "bootconfig";
- reg = <0x00200000 0x00100000>;
- read-only;
- };
- partition@300000 {
- label = "qsee";
- reg = <0x00300000 0x00100000>;
- read-only;
- };
- partition@400000 {
- label = "qsee_alt";
- reg = <0x00400000 0x00100000>;
- read-only;
- };
- partition@500000 {
- label = "cdt";
- reg = <0x00500000 0x00080000>;
- read-only;
- };
- partition@580000 {
- label = "cdt_alt";
- reg = <0x00580000 0x00080000>;
- read-only;
- };
- partition@600000 {
- label = "ddrparams";
- reg = <0x00600000 0x00080000>;
- read-only;
- };
- partition@700000 {
- label = "u-boot";
- reg = <0x00700000 0x00200000>;
- read-only;
- };
- partition@900000 {
- label = "u-boot-backup";
- reg = <0x00900000 0x00200000>;
- read-only;
- };
- partition@b00000 {
- label = "ART";
- reg = <0x00b00000 0x00080000>;
- read-only;
- };
- partition@c00000 {
- label = "ubi";
- reg = <0x00c00000 0x07000000>;
- /*
- * Do not try to allocate the remaining
- * 4 MiB to this ubi partition. It will
- * confuse the u-boot and it might not
- * find the kernel partition anymore.
- */
- volumes {
- ubi_art: ubi-volume-art {
- volname = "ART";
- };
- };
- };
- };
- };
-};
-
-&ubi_art {
- nvmem-layout {
- compatible = "fixed-layout";
- #address-cells = <1>;
- #size-cells = <1>;
-
- precal_factory_1000: precal@1000 {
- reg = <0x1000 0x2f20>;
- };
-
- precal_factory_5000: precal@5000 {
- reg = <0x5000 0x2f20>;
- };
-
- cal_factory_9000: cal@9000 {
- reg = <0x9000 0x844>;
- };
- };
-};
-
-&pcie0 {
- status = "okay";
- perst-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
- wake-gpios = <&tlmm 50 GPIO_ACTIVE_LOW>;
-};
-
-&pcie_bridge0 {
- wifi@0,0 {
- compatible = "qcom,ath10k";
- reg = <0x00010000 0 0 0 0>;
- nvmem-cells = <&mac_address 1>, <&cal_factory_9000>;
- nvmem-cell-names = "mac-address", "calibration";
- };
-};
-
-&qpic_bam {
- status = "okay";
-};
-
-&tlmm {
- /*
- * GPIO43 should be 0/1 whenever the unit is
- * powered through PoE or AC-Adapter.
- * That said, playing with this seems to
- * reset the AP.
- */
-
- mdio_pins: mdio_pinmux {
- mux_1 {
- pins = "gpio6";
- function = "mdio";
- bias-pull-up;
- };
- mux_2 {
- pins = "gpio7";
- function = "mdc";
- bias-pull-up;
- };
- };
-
- serial_0_pins: serial_pinmux {
- mux {
- pins = "gpio16", "gpio17";
- function = "blsp_uart0";
- bias-disable;
- };
- };
-
- serial_1_pins: serial1_pinmux {
- mux {
- /* We use the i2c-0 pins for serial_1 */
- pins = "gpio8", "gpio9";
- function = "blsp_uart1";
- bias-disable;
- };
- };
-
- i2c_0_pins: i2c_0_pinmux {
- pinmux {
- function = "blsp_i2c0";
- pins = "gpio20", "gpio21";
- };
- pinconf {
- pins = "gpio20", "gpio21";
- drive-strength = <16>;
- bias-disable;
- };
- };
-
- i2c_1_pins: i2c_1_pinmux {
- pinmux {
- function = "blsp_i2c1";
- pins = "gpio34", "gpio35";
- };
- pinconf {
- pins = "gpio34", "gpio35";
- drive-strength = <16>;
- bias-disable;
- };
- };
-
- nand_pins: nand_pins {
- /*
- * There are 18 pins. 15 pins are common between LCD and NAND.
- * The QPIC controller arbitrates between LCD and NAND. Of the
- * remaining 4, 2 are for NAND and 2 are for LCD exclusively.
- *
- * The meraki source hints that the bluetooth module claims
- * pin 52 as well. But sadly, there's no data whenever this
- * is a NAND or LCD exclusive pin or not.
- */
-
- pullups {
- pins = "gpio52", "gpio53", "gpio58",
- "gpio59";
- function = "qpic";
- bias-pull-up;
- };
-
- pulldowns {
- pins = "gpio54", "gpio55", "gpio56",
- "gpio57", "gpio60", "gpio61",
- "gpio62", "gpio63", "gpio64",
- "gpio65", "gpio66", "gpio67",
- "gpio68", "gpio69";
- function = "qpic";
- bias-pull-down;
- };
- };
-};
-
-&wifi0 {
- status = "okay";
- nvmem-cells = <&mac_address 2>, <&precal_factory_1000>;
- nvmem-cell-names = "mac-address", "pre-calibration";
-};
-
-&wifi1 {
- status = "okay";
- nvmem-cells = <&mac_address 3>, <&precal_factory_5000>;
- nvmem-cell-names = "mac-address", "pre-calibration";
-};
-
-&mdio {
- status = "okay";
- pinctrl-0 = <&mdio_pins>;
- pinctrl-names = "default";
-
- ar8035: ethernet-phy@1 {
- reg = <1>;
- };
-
- ethernet-phy-package@0 {
- status = "disabled";
- };
-};
-
-&gmac {
- status = "okay";
- nvmem-cells = <&mac_address 0>;
- nvmem-cell-names = "mac-address";
-};
-
-&switch {
- status = "okay";
-
- /delete-property/ psgmii-ethphy;
-};
-
-&swport5 {
- status = "okay";
-
- label = "lan";
- phy-handle = <&ar8035>;
- phy-mode = "rgmii-rxid";
-};
-
-ðphy0 {
- status = "disabled";
-};
-
-ðphy1 {
- status = "disabled";
-};
-
-ðphy2 {
- status = "disabled";
-};
-
-ðphy3 {
- status = "disabled";
-};
-
-ðphy4 {
- status = "disabled";
-};
-
-&psgmiiphy {
- status = "disabled";
-};
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Device Tree Source for Meraki devices
+ *
+ * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
+ * Copyright (C) 2017 Christian Lamparter <chunkeey@googlemail.com>
+ * Copyright (C) 2025 Hal Martin <halmartin@googlemail.com>
+ *
+ * Based on Cisco Meraki DTS from GPL release r25-linux-3.14-20170427
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ */
+
+#include "qcom-ipq4019.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/soc/qcom,tcsr.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+ soc {
+ /* It is a 56-bit counter that supplies the count to the ARM arch
+ timers and without upstream driver */
+ counter@4a1000 {
+ compatible = "qcom,qca-gcnt";
+ reg = <0x4a1000 0x4>;
+ };
+
+ ess_tcsr@1953000 {
+ compatible = "qcom,tcsr";
+ reg = <0x1953000 0x1000>;
+ };
+
+ tcsr@1949000 {
+ compatible = "qcom,tcsr";
+ reg = <0x1949000 0x100>;
+ qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+ };
+
+ tcsr@1957000 {
+ compatible = "qcom,tcsr";
+ reg = <0x1957000 0x100>;
+ qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+ };
+ };
+
+ keys {
+ compatible = "gpio-keys";
+
+ reset {
+ label = "reset";
+ gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ };
+ };
+};
+
+&watchdog {
+ status = "okay";
+};
+
+&prng {
+ status = "okay";
+};
+
+&crypto {
+ status = "okay";
+};
+
+&blsp_dma {
+ status = "okay";
+};
+
+&blsp1_uart1 {
+ pinctrl-0 = <&serial_0_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&cryptobam {
+ status = "okay";
+};
+
+&blsp1_i2c3 {
+ pinctrl-0 = <&i2c_0_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&nand {
+ pinctrl-0 = <&nand_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ nand@0 {
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "sbl1";
+ reg = <0x00000000 0x00100000>;
+ read-only;
+ };
+ partition@100000 {
+ label = "mibib";
+ reg = <0x00100000 0x00100000>;
+ read-only;
+ };
+ partition@200000 {
+ label = "bootconfig";
+ reg = <0x00200000 0x00100000>;
+ read-only;
+ };
+ partition@300000 {
+ label = "qsee";
+ reg = <0x00300000 0x00100000>;
+ read-only;
+ };
+ partition@400000 {
+ label = "qsee_alt";
+ reg = <0x00400000 0x00100000>;
+ read-only;
+ };
+ partition@500000 {
+ label = "cdt";
+ reg = <0x00500000 0x00080000>;
+ read-only;
+ };
+ partition@580000 {
+ label = "cdt_alt";
+ reg = <0x00580000 0x00080000>;
+ read-only;
+ };
+ partition@600000 {
+ label = "ddrparams";
+ reg = <0x00600000 0x00080000>;
+ read-only;
+ };
+ partition@700000 {
+ label = "u-boot";
+ reg = <0x00700000 0x00200000>;
+ read-only;
+ };
+ partition@900000 {
+ label = "u-boot-backup";
+ reg = <0x00900000 0x00200000>;
+ read-only;
+ };
+ partition@b00000 {
+ label = "ART";
+ reg = <0x00b00000 0x00080000>;
+ read-only;
+ };
+ partition@c00000 {
+ label = "ubi";
+ reg = <0x00c00000 0x07000000>;
+ /*
+ * Do not try to allocate the remaining
+ * 4 MiB to this ubi partition. It will
+ * confuse the u-boot and it might not
+ * find the kernel partition anymore.
+ */
+ volumes {
+ ubi_art: ubi-volume-art {
+ volname = "ART";
+ };
+ };
+ };
+ };
+ };
+};
+
+&pcie0 {
+ status = "disabled";
+ perst-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
+ wake-gpios = <&tlmm 50 GPIO_ACTIVE_LOW>;
+};
+
+&ubi_art {
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ precal_factory_1000: precal@1000 {
+ reg = <0x1000 0x2f20>;
+ };
+
+ precal_factory_5000: precal@5000 {
+ reg = <0x5000 0x2f20>;
+ };
+
+ cal_factory_9000: cal@9000 {
+ reg = <0x9000 0x844>;
+ };
+ };
+};
+
+&qpic_bam {
+ status = "okay";
+};
+
+&tlmm {
+ mdio_pins: mdio_pinmux {
+ mux_1 {
+ pins = "gpio6";
+ function = "mdio";
+ bias-pull-up;
+ };
+ mux_2 {
+ pins = "gpio7";
+ function = "mdc";
+ bias-pull-up;
+ };
+ };
+
+ serial_0_pins: serial_pinmux {
+ mux {
+ pins = "gpio16", "gpio17";
+ function = "blsp_uart0";
+ bias-disable;
+ };
+ };
+
+ serial_1_pins: serial1_pinmux {
+ mux {
+ /* We use the i2c-0 pins for serial_1 */
+ pins = "gpio8", "gpio9";
+ function = "blsp_uart1";
+ bias-disable;
+ };
+ };
+
+ i2c_0_pins: i2c_0_pinmux {
+ function = "blsp_i2c0";
+ pins = "gpio20", "gpio21";
+ drive-strength = <16>;
+ bias-disable;
+ };
+
+ i2c_1_pins: i2c_1_pinmux {
+ function = "blsp_i2c1";
+ pins = "gpio34", "gpio35";
+ drive-strength = <16>;
+ bias-disable;
+ };
+
+ nand_pins: nand_pins {
+ /*
+ * There are 18 pins. 15 pins are common between LCD and NAND.
+ * The QPIC controller arbitrates between LCD and NAND. Of the
+ * remaining 4, 2 are for NAND and 2 are for LCD exclusively.
+ *
+ * The meraki source hints that the bluetooth module claims
+ * pin 52 as well. But sadly, there's no data whenever this
+ * is a NAND or LCD exclusive pin or not.
+ */
+
+ pullups {
+ pins = "gpio53", "gpio58", "gpio59";
+ function = "qpic";
+ bias-pull-up;
+ };
+
+ pulldowns {
+ pins = "gpio55", "gpio56", "gpio57",
+ "gpio60", "gpio62", "gpio63",
+ "gpio64", "gpio65", "gpio66",
+ "gpio67", "gpio68", "gpio69";
+ function = "qpic";
+ bias-pull-down;
+ };
+ };
+};
+
+&mdio {
+ status = "okay";
+ pinctrl-0 = <&mdio_pins>;
+ pinctrl-names = "default";
+};
+
+&switch {
+ status = "okay";
+};
+
+&gmac {
+ status = "okay";
+ nvmem-cells = <&mac_address 0>;
+ nvmem-cell-names = "mac-address";
+};
+
+&wifi0 {
+ status = "disabled";
+ nvmem-cells = <&mac_address 2>, <&precal_factory_1000>;
+ nvmem-cell-names = "mac-address", "pre-calibration";
+};
+
+&wifi1 {
+ status = "disabled";
+ nvmem-cells = <&mac_address 3>, <&precal_factory_5000>;
+ nvmem-cell-names = "mac-address", "pre-calibration";
+};
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Device Tree Source for Meraki devices
+ *
+ * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
+ * Copyright (C) 2017 Christian Lamparter <chunkeey@googlemail.com>
+ * Copyright (C) 2025 Hal Martin <halmartin@googlemail.com>
+ *
+ * Based on Cisco Meraki DTS from GPL release r25-linux-3.14-20170427
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ */
+
+#include "qcom-ipq4029-meraki-common.dtsi"
+
+/ {
+ aliases {
+ led-boot = &status_green;
+ led-failsafe = &status_red;
+ led-running = &status_green;
+ led-upgrade = &power_orange;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power_orange: power {
+ function = LED_FUNCTION_POWER;
+ color = <LED_COLOR_ID_ORANGE>;
+ gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
+ panic-indicator;
+ };
+ };
+};
+
+&blsp1_i2c3 {
+ eeprom@50 {
+ compatible = "atmel,24c64";
+ pagesize = <32>;
+ reg = <0x50>;
+ read-only; /* This holds our MAC & Meraki board-data */
+
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ mac_address: mac-address@66 {
+ compatible = "mac-base";
+ reg = <0x66 0x6>;
+ #nvmem-cell-cells = <1>;
+ };
+ };
+ };
+};
+
+&blsp1_i2c4 {
+ pinctrl-0 = <&i2c_1_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ tricolor: led-controller@30 {
+ compatible = "ti,lp5562";
+ reg = <0x30>;
+ clock-mode = /bits/8 <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* RGB led */
+ status_red: chan@0 {
+ chan-name = "red:status";
+ led-cur = /bits/ 8 <0x20>;
+ max-cur = /bits/ 8 <0x60>;
+ reg = <0>;
+ color = <LED_COLOR_ID_RED>;
+ };
+
+ status_green: chan@1 {
+ chan-name = "green:status";
+ led-cur = /bits/ 8 <0x20>;
+ max-cur = /bits/ 8 <0x60>;
+ reg = <1>;
+ color = <LED_COLOR_ID_GREEN>;
+ };
+
+ chan@2 {
+ chan-name = "blue:status";
+ led-cur = /bits/ 8 <0x20>;
+ max-cur = /bits/ 8 <0x60>;
+ reg = <2>;
+ color = <LED_COLOR_ID_BLUE>;
+ };
+
+ chan@3 {
+ chan-name = "white:status";
+ led-cur = /bits/ 8 <0x20>;
+ max-cur = /bits/ 8 <0x60>;
+ reg = <3>;
+ color = <LED_COLOR_ID_WHITE>;
+ };
+ };
+};
+
+&gmac {
+ status = "okay";
+ nvmem-cells = <&mac_address 0>;
+ nvmem-cell-names = "mac-address";
+};
+
+&wifi0 {
+ status = "disabled";
+ nvmem-cells = <&mac_address 2>, <&precal_factory_1000>;
+ nvmem-cell-names = "mac-address", "pre-calibration";
+};
+
+&wifi1 {
+ status = "disabled";
+ nvmem-cells = <&mac_address 3>, <&precal_factory_5000>;
+ nvmem-cell-names = "mac-address", "pre-calibration";
+};
// SPDX-License-Identifier: GPL-2.0-only
// Device Tree Source for Meraki MR30H (Noisy Cricket)
-#include "qcom-ipq4029-wired-qca-common.dtsi"
+#include "qcom-ipq4029-meraki-insect.dtsi"
/ {
model = "Meraki MR30H";
compatible = "meraki,mr30h";
- soc {
- /* for USB PHY, device has no USB port */
- tcsr@194b000 {
- status = "disabled";
- };
- };
-
leds {
compatible = "gpio-leds";
gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
};
};
-};
-
-&usb2_hs_phy {
- status = "disabled";
-};
-&usb2 {
- status = "disabled";
-};
-
-&usb3_hs_phy {
- status = "disabled";
-};
-
-&usb3_ss_phy {
- status = "disabled";
+ soc {
+ ess_tcsr@1953000 {
+ qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+ };
+ };
};
-&usb3 {
- status = "disabled";
+&tricolor {
+ enable-gpio = <&tlmm 48 GPIO_ACTIVE_HIGH>;
};
&pcie0 {
};
&pcie_bridge0 {
- wifi2: wifi@1,0 {
+ wifi2: wifi@0,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&cal_factory_9000>;
qcom,ath10k-calibration-variant = "Meraki-MR30H";
};
-
&swport1 {
label = "lan4";
status = "okay";
// SPDX-License-Identifier: GPL-2.0-only
// Device Tree Source for Meraki MR33 (Stinkbug)
-#include "qcom-ipq4029-insect-common.dtsi"
+#include "qcom-ipq4029-meraki-insect.dtsi"
/ {
model = "Meraki MR33 Access Point";
compatible = "meraki,mr33";
+
+ soc {
+ ess_tcsr@1953000 {
+ qcom,ess-interface-select = <TCSR_ESS_PSGMII_RGMII5>;
+ };
+ };
};
&tricolor {
enable-gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>;
};
+&pcie0 {
+ status = "okay";
+};
+
+&pcie_bridge0 {
+ wifi@0,0 {
+ compatible = "qcom,ath10k";
+ reg = <0x00010000 0 0 0 0>;
+ nvmem-cells = <&mac_address 1>, <&cal_factory_9000>;
+ nvmem-cell-names = "mac-address", "calibration";
+ };
+};
+
&wifi0 {
+ status = "okay";
qcom,ath10k-calibration-variant = "Meraki-MR33";
};
&wifi1 {
+ status = "okay";
qcom,ath10k-calibration-variant = "Meraki-MR33";
};
+
+&mdio {
+ ar8035: ethernet-phy@1 {
+ reg = <1>;
+ };
+
+ ethernet-phy-package@0 {
+ status = "disabled";
+ };
+};
+
+&switch {
+ /delete-property/ psgmii-ethphy;
+};
+
+&swport5 {
+ status = "okay";
+
+ label = "lan";
+ phy-handle = <&ar8035>;
+ phy-mode = "rgmii-rxid";
+};
+
+ðphy0 {
+ status = "disabled";
+};
+
+ðphy1 {
+ status = "disabled";
+};
+
+ðphy2 {
+ status = "disabled";
+};
+
+ðphy3 {
+ status = "disabled";
+};
+
+ðphy4 {
+ status = "disabled";
+};
+
+&psgmiiphy {
+ status = "disabled";
+};
// SPDX-License-Identifier: GPL-2.0-only
// Device Tree Source for Meraki MR74 (Ladybug)
-#include "qcom-ipq4029-insect-common.dtsi"
+#include "qcom-ipq4029-meraki-insect.dtsi"
/ {
model = "Meraki MR74 Access Point";
compatible = "meraki,mr74";
+
+ soc {
+ ess_tcsr@1953000 {
+ qcom,ess-interface-select = <TCSR_ESS_PSGMII_RGMII5>;
+ };
+ };
};
&tricolor {
enable-gpios = <&tlmm 14 GPIO_ACTIVE_LOW>;
};
+&pcie0 {
+ status = "okay";
+};
+
+&pcie_bridge0 {
+ wifi@0,0 {
+ compatible = "qcom,ath10k";
+ reg = <0x00010000 0 0 0 0>;
+ nvmem-cells = <&mac_address 1>, <&cal_factory_9000>;
+ nvmem-cell-names = "mac-address", "calibration";
+ };
+};
+
&wifi0 {
+ status = "okay";
qcom,ath10k-calibration-variant = "Meraki-MR33";
};
&wifi1 {
+ status = "okay";
qcom,ath10k-calibration-variant = "Meraki-MR33";
};
+
+&mdio {
+ ar8035: ethernet-phy@1 {
+ reg = <1>;
+ };
+
+ ethernet-phy-package@0 {
+ status = "disabled";
+ };
+};
+
+&switch {
+ /delete-property/ psgmii-ethphy;
+};
+
+&swport5 {
+ status = "okay";
+
+ label = "lan";
+ phy-handle = <&ar8035>;
+ phy-mode = "rgmii-rxid";
+};
+
+ðphy0 {
+ status = "disabled";
+};
+
+ðphy1 {
+ status = "disabled";
+};
+
+ðphy2 {
+ status = "disabled";
+};
+
+ðphy3 {
+ status = "disabled";
+};
+
+ðphy4 {
+ status = "disabled";
+};
+
+&psgmiiphy {
+ status = "disabled";
+};
// SPDX-License-Identifier: GPL-2.0-only
// Device Tree Source for Meraki Z3 (Fuzzy Cricket)
-#include "qcom-ipq4029-wired-qca-common.dtsi"
+#include "qcom-ipq4029-meraki-insect.dtsi"
/ {
model = "Meraki Z3 Router";
compatible = "meraki,z3";
+ soc {
+ ess_tcsr@1953000 {
+ qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+ };
+
+ tcsr@194b000 {
+ /* select hostmode */
+ compatible = "qcom,tcsr";
+ reg = <0x194b000 0x100>;
+ qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+ status = "okay";
+ };
+ };
+
leds {
compatible = "gpio-leds";
};
};
+&tricolor {
+ enable-gpio = <&tlmm 48 GPIO_ACTIVE_HIGH>;
+};
+
+&usb2_hs_phy {
+ status = "okay";
+};
+
+&usb2 {
+ status = "okay";
+};
+
+&usb3_hs_phy {
+ status = "okay";
+};
+
+&usb3_ss_phy {
+ status = "okay";
+};
+
+&usb3 {
+ status = "okay";
+};
+
+&swport1 {
+ label = "wan";
+ status = "okay";
+};
+
+&swport2 {
+ label = "lan2";
+ status = "okay";
+};
+
+&swport3 {
+ label = "lan3";
+ status = "okay";
+};
+
+&swport4 {
+ label = "lan4";
+ status = "okay";
+};
+
+&swport5 {
+ label = "lan5";
+ status = "okay";
+};
+
&wifi0 {
status = "okay";
qcom,ath10k-calibration-variant = "Meraki-Z3";
projects / openwrt / openwrt.git / commitdiff