IB/mlx5: Mmap the HCA's clock info to user-space

This patch maps the new page to user space applications to
allow converting a user space completion timestamp to system wall
time at the lowest possible latency cost.
By using a versioning scheme we allow compatibility between current
and future userspace libraries.
The change moves mlx5_ib_mmap_cmd enum from mlx5_ib.h to the
abi header file mlx5-abi.h.

Reviewed-by: Alex Vesker <valex@mellanox.com>
Reviewed-by: Yishai Hadas <yishaih@mellanox.com>
Signed-off-by: Feras Daoud <ferasda@mellanox.com>
Signed-off-by: Eitan Rabin <rabin@mellanox.com>
Signed-off-by: Leon Romanovsky <leon@kernel.org>
Signed-off-by: Doug Ledford <dledford@redhat.com>

diff --git a/drivers/infiniband/hw/mlx5/main.c b/drivers/infiniband/hw/mlx5/main.c
index 91e6b42798e5c6b1a4eec75a066d08f40d3a5c51..f282e281eff24b177da1ed033cab9b446820b499 100644 (file)
--- a/drivers/infiniband/hw/mlx5/main.c
+++ b/drivers/infiniband/hw/mlx5/main.c
@@ -1579,6 +1579,7 @@ static struct ib_ucontext *mlx5_ib_alloc_ucontext(struct ib_device *ibdev,
        struct mlx5_ib_dev *dev = to_mdev(ibdev);
        struct mlx5_ib_alloc_ucontext_req_v2 req = {};
        struct mlx5_ib_alloc_ucontext_resp resp = {};
+       struct mlx5_core_dev *mdev = dev->mdev;
        struct mlx5_ib_ucontext *context;
        struct mlx5_bfreg_info *bfregi;
        int ver;
@@ -1706,6 +1707,12 @@ static struct ib_ucontext *mlx5_ib_alloc_ucontext(struct ib_device *ibdev,
                resp.response_length += sizeof(resp.eth_min_inline);
        }
 
+       if (field_avail(typeof(resp), clock_info_versions, udata->outlen)) {
+               if (mdev->clock_info)
+                       resp.clock_info_versions = BIT(MLX5_IB_CLOCK_INFO_V1);
+               resp.response_length += sizeof(resp.clock_info_versions);
+       }
+
        /*
         * We don't want to expose information from the PCI bar that is located
         * after 4096 bytes, so if the arch only supports larger pages, let's
@@ -1719,8 +1726,7 @@ static struct ib_ucontext *mlx5_ib_alloc_ucontext(struct ib_device *ibdev,
                        resp.hca_core_clock_offset =
                                offsetof(struct mlx5_init_seg, internal_timer_h) % PAGE_SIZE;
                }
-               resp.response_length += sizeof(resp.hca_core_clock_offset) +
-                                       sizeof(resp.reserved2);
+               resp.response_length += sizeof(resp.hca_core_clock_offset);
        }
 
        if (field_avail(typeof(resp), log_uar_size, udata->outlen))
@@ -1959,6 +1965,38 @@ static inline char *mmap_cmd2str(enum mlx5_ib_mmap_cmd cmd)
        }
 }
 
+static int mlx5_ib_mmap_clock_info_page(struct mlx5_ib_dev *dev,
+                                       struct vm_area_struct *vma,
+                                       struct mlx5_ib_ucontext *context)
+{
+       phys_addr_t pfn;
+       int err;
+
+       if (vma->vm_end - vma->vm_start != PAGE_SIZE)
+               return -EINVAL;
+
+       if (get_index(vma->vm_pgoff) != MLX5_IB_CLOCK_INFO_V1)
+               return -EOPNOTSUPP;
+
+       if (vma->vm_flags & VM_WRITE)
+               return -EPERM;
+
+       if (!dev->mdev->clock_info_page)
+               return -EOPNOTSUPP;
+
+       pfn = page_to_pfn(dev->mdev->clock_info_page);
+       err = remap_pfn_range(vma, vma->vm_start, pfn, PAGE_SIZE,
+                             vma->vm_page_prot);
+       if (err)
+               return err;
+
+       mlx5_ib_dbg(dev, "mapped clock info at 0x%lx, PA 0x%llx\n",
+                   vma->vm_start,
+                   (unsigned long long)pfn << PAGE_SHIFT);
+
+       return mlx5_ib_set_vma_data(vma, context);
+}
+
 static int uar_mmap(struct mlx5_ib_dev *dev, enum mlx5_ib_mmap_cmd cmd,
                    struct vm_area_struct *vma,
                    struct mlx5_ib_ucontext *context)
@@ -2121,6 +2159,8 @@ static int mlx5_ib_mmap(struct ib_ucontext *ibcontext, struct vm_area_struct *vm
                            vma->vm_start,
                            (unsigned long long)pfn << PAGE_SHIFT);
                break;
+       case MLX5_IB_MMAP_CLOCK_INFO:
+               return mlx5_ib_mmap_clock_info_page(dev, vma, context);
 
        default:
                return -EINVAL;

diff --git a/drivers/infiniband/hw/mlx5/mlx5_ib.h b/drivers/infiniband/hw/mlx5/mlx5_ib.h
index 51228dfcfbe7b1db2fc5a79e87bd17f29b16ead4..69a80f7512f09408a7e7209c694aa40de11b0929 100644 (file)
--- a/drivers/infiniband/hw/mlx5/mlx5_ib.h
+++ b/drivers/infiniband/hw/mlx5/mlx5_ib.h
@@ -70,16 +70,6 @@ enum {
        MLX5_IB_MMAP_CMD_MASK   = 0xff,
 };
 
-enum mlx5_ib_mmap_cmd {
-       MLX5_IB_MMAP_REGULAR_PAGE               = 0,
-       MLX5_IB_MMAP_GET_CONTIGUOUS_PAGES       = 1,
-       MLX5_IB_MMAP_WC_PAGE                    = 2,
-       MLX5_IB_MMAP_NC_PAGE                    = 3,
-       /* 5 is chosen in order to be compatible with old versions of libmlx5 */
-       MLX5_IB_MMAP_CORE_CLOCK                 = 5,
-       MLX5_IB_MMAP_ALLOC_WC                   = 6,
-};
-
 enum {
        MLX5_RES_SCAT_DATA32_CQE        = 0x1,
        MLX5_RES_SCAT_DATA64_CQE        = 0x2,

diff --git a/include/uapi/rdma/mlx5-abi.h b/include/uapi/rdma/mlx5-abi.h
index 0299deed71a243a0722ff62728806fdd953a8f60..1111aa4e7c1ed0720517629d0a383b8039a19628 100644 (file)
--- a/include/uapi/rdma/mlx5-abi.h
+++ b/include/uapi/rdma/mlx5-abi.h
@@ -124,7 +124,7 @@ struct mlx5_ib_alloc_ucontext_resp {
        __u8    cqe_version;
        __u8    cmds_supp_uhw;
        __u8    eth_min_inline;
-       __u8    reserved2;
+       __u8    clock_info_versions;
        __u64   hca_core_clock_offset;
        __u32   log_uar_size;
        __u32   num_uars_per_page;
@@ -394,7 +394,23 @@ struct mlx5_ib_clock_info {
        __u64 overflow_period;
 };
 
+enum mlx5_ib_mmap_cmd {
+       MLX5_IB_MMAP_REGULAR_PAGE               = 0,
+       MLX5_IB_MMAP_GET_CONTIGUOUS_PAGES       = 1,
+       MLX5_IB_MMAP_WC_PAGE                    = 2,
+       MLX5_IB_MMAP_NC_PAGE                    = 3,
+       /* 5 is chosen in order to be compatible with old versions of libmlx5 */
+       MLX5_IB_MMAP_CORE_CLOCK                 = 5,
+       MLX5_IB_MMAP_ALLOC_WC                   = 6,
+       MLX5_IB_MMAP_CLOCK_INFO                 = 7,
+};
+
 enum {
        MLX5_IB_CLOCK_INFO_KERNEL_UPDATING = 1,
 };
+
+/* Bit indexes for the mlx5_alloc_ucontext_resp.clock_info_versions bitmap */
+enum {
+       MLX5_IB_CLOCK_INFO_V1              = 0,
+};
 #endif /* MLX5_ABI_USER_H */