};
enum b43_firmware_hdr_format {
+ B43_FW_HDR_598,
B43_FW_HDR_410,
B43_FW_HDR_351,
};
struct b43_leds leds;
/* Kmalloc'ed scratch space for PIO TX/RX. Protected by wl->mutex. */
- u8 pio_scratchspace[110] __attribute__((__aligned__(8)));
+ u8 pio_scratchspace[118] __attribute__((__aligned__(8)));
u8 pio_tailspace[4] __attribute__((__aligned__(8)));
};
}
dev->fw.rev = fwrev;
dev->fw.patch = fwpatch;
- if (dev->fw.rev >= 410)
+ if (dev->fw.rev >= 598)
+ dev->fw.hdr_format = B43_FW_HDR_598;
+ else if (dev->fw.rev >= 410)
dev->fw.hdr_format = B43_FW_HDR_410;
else
dev->fw.hdr_format = B43_FW_HDR_351;
}
}
switch (dev->fw.hdr_format) {
+ case B43_FW_HDR_598:
+ b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->format_598.plcp),
+ plcp_fragment_len, rate);
+ break;
case B43_FW_HDR_351:
b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->format_351.plcp),
plcp_fragment_len, rate);
struct ieee80211_cts *uninitialized_var(cts);
switch (dev->fw.hdr_format) {
+ case B43_FW_HDR_598:
+ cts = (struct ieee80211_cts *)
+ (txhdr->format_598.rts_frame);
+ break;
case B43_FW_HDR_351:
cts = (struct ieee80211_cts *)
(txhdr->format_351.rts_frame);
struct ieee80211_rts *uninitialized_var(rts);
switch (dev->fw.hdr_format) {
+ case B43_FW_HDR_598:
+ rts = (struct ieee80211_rts *)
+ (txhdr->format_598.rts_frame);
+ break;
case B43_FW_HDR_351:
rts = (struct ieee80211_rts *)
(txhdr->format_351.rts_frame);
/* Generate the PLCP headers for the RTS/CTS frame */
switch (dev->fw.hdr_format) {
+ case B43_FW_HDR_598:
+ plcp = &txhdr->format_598.rts_plcp;
+ break;
case B43_FW_HDR_351:
plcp = &txhdr->format_351.rts_plcp;
break;
len, rts_rate_fb);
switch (dev->fw.hdr_format) {
+ case B43_FW_HDR_598:
+ hdr = (struct ieee80211_hdr *)
+ (&txhdr->format_598.rts_frame);
+ break;
case B43_FW_HDR_351:
hdr = (struct ieee80211_hdr *)
(&txhdr->format_351.rts_frame);
/* Magic cookie */
switch (dev->fw.hdr_format) {
+ case B43_FW_HDR_598:
+ txhdr->format_598.cookie = cpu_to_le16(cookie);
+ break;
case B43_FW_HDR_351:
txhdr->format_351.cookie = cpu_to_le16(cookie);
break;
__le32 timeout; /* Timeout */
union {
+ /* Tested with 598.314, 644.1001 and 666.2 */
+ struct {
+ __le16 mimo_antenna; /* MIMO antenna select */
+ __le16 preload_size; /* Preload size */
+ PAD_BYTES(2);
+ __le16 cookie; /* TX frame cookie */
+ __le16 tx_status; /* TX status */
+ __le16 max_n_mpdus;
+ __le16 max_a_bytes_mrt;
+ __le16 max_a_bytes_fbr;
+ __le16 min_m_bytes;
+ struct b43_plcp_hdr6 rts_plcp; /* RTS PLCP header */
+ __u8 rts_frame[16]; /* The RTS frame (if used) */
+ PAD_BYTES(2);
+ struct b43_plcp_hdr6 plcp; /* Main PLCP header */
+ } format_598 __packed;
+
/* Tested with 410.2160, 478.104 and 508.* */
struct {
__le16 mimo_antenna; /* MIMO antenna select */
size_t b43_txhdr_size(struct b43_wldev *dev)
{
switch (dev->fw.hdr_format) {
+ case B43_FW_HDR_598:
+ return 112 + sizeof(struct b43_plcp_hdr6);
case B43_FW_HDR_410:
return 104 + sizeof(struct b43_plcp_hdr6);
case B43_FW_HDR_351: