tty: serial: qcom_geni_serial: Remove interrupt storm

Disable M_TX_FIFO_WATERMARK_EN after we've sent all data for a given
transaction so we don't continue to receive a flurry of free space
interrupts while waiting for the M_CMD_DONE notification. Re-enable the
watermark when establishing the next transaction.

Also clear the watermark interrupt after filling the FIFO so we do not
receive notification again prior to actually having free space.

Signed-off-by: Ryan Case <ryandcase@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/tty/serial/qcom_geni_serial.c b/drivers/tty/serial/qcom_geni_serial.c
index 8fead2e27eb9eb21e635934593fd339916237ce2..cf7a95e339ad9471c144df29b621fb9249e7e543 100644 (file)
--- a/drivers/tty/serial/qcom_geni_serial.c
+++ b/drivers/tty/serial/qcom_geni_serial.c
@@ -722,6 +722,7 @@ static void qcom_geni_serial_handle_tx(struct uart_port *uport, bool done,
        size_t pending;
        int i;
        u32 status;
+       u32 irq_en;
        unsigned int chunk;
        int tail;
 
@@ -750,6 +751,11 @@ static void qcom_geni_serial_handle_tx(struct uart_port *uport, bool done,
        if (!port->tx_remaining) {
                qcom_geni_serial_setup_tx(uport, pending);
                port->tx_remaining = pending;
+
+               irq_en = readl_relaxed(uport->membase + SE_GENI_M_IRQ_EN);
+               if (!(irq_en & M_TX_FIFO_WATERMARK_EN))
+                       writel_relaxed(irq_en | M_TX_FIFO_WATERMARK_EN,
+                                       uport->membase + SE_GENI_M_IRQ_EN);
        }
 
        remaining = chunk;
@@ -773,7 +779,23 @@ static void qcom_geni_serial_handle_tx(struct uart_port *uport, bool done,
        }
 
        xmit->tail = tail & (UART_XMIT_SIZE - 1);
+
+       /*
+        * The tx fifo watermark is level triggered and latched. Though we had
+        * cleared it in qcom_geni_serial_isr it will have already reasserted
+        * so we must clear it again here after our writes.
+        */
+       writel_relaxed(M_TX_FIFO_WATERMARK_EN,
+                       uport->membase + SE_GENI_M_IRQ_CLEAR);
+
 out_write_wakeup:
+       if (!port->tx_remaining) {
+               irq_en = readl_relaxed(uport->membase + SE_GENI_M_IRQ_EN);
+               if (irq_en & M_TX_FIFO_WATERMARK_EN)
+                       writel_relaxed(irq_en & ~M_TX_FIFO_WATERMARK_EN,
+                                       uport->membase + SE_GENI_M_IRQ_EN);
+       }
+
        if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
                uart_write_wakeup(uport);
 }
@@ -809,8 +831,7 @@ static irqreturn_t qcom_geni_serial_isr(int isr, void *dev)
                tty_insert_flip_char(tport, 0, TTY_OVERRUN);
        }
 
-       if (m_irq_status & (M_TX_FIFO_WATERMARK_EN | M_CMD_DONE_EN) &&
-           m_irq_en & (M_TX_FIFO_WATERMARK_EN | M_CMD_DONE_EN))
+       if (m_irq_status & m_irq_en & (M_TX_FIFO_WATERMARK_EN | M_CMD_DONE_EN))
                qcom_geni_serial_handle_tx(uport, m_irq_status & M_CMD_DONE_EN,
                                        geni_status & M_GENI_CMD_ACTIVE);