drm/vc4: Fix pitch setup for T-format scanout.

The documentation said to use src_w here, and I didn't consider that
we actually needed to be using pitch somewhere in our setup.  Fixes
scanout on my DSI panel when X11 does initial setup with 1920x1080
HDMI and 800x480 DSI both at 0,0 of the same framebuffer.

v2: Add some comments requested by Boris

Signed-off-by: Eric Anholt <eric@anholt.net>
Fixes: 98830d91da08 ("drm/vc4: Add T-format scanout support.")
Link: https://patchwork.freedesktop.org/patch/msgid/20170927193209.11870-1-eric@anholt.net
Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>

diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
index 2968b3ebb895714cb8c8faeaf40dff1c996f2259..3a767a038f725a995f125e708d3d3b491ddd5317 100644 (file)
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -547,14 +547,24 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
                tiling = SCALER_CTL0_TILING_LINEAR;
                pitch0 = VC4_SET_FIELD(fb->pitches[0], SCALER_SRC_PITCH);
                break;
-       case DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED:
+
+       case DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED: {
+               /* For T-tiled, the FB pitch is "how many bytes from
+                * one row to the next, such that pitch * tile_h ==
+                * tile_size * tiles_per_row."
+                */
+               u32 tile_size_shift = 12; /* T tiles are 4kb */
+               u32 tile_h_shift = 5; /* 16 and 32bpp are 32 pixels high */
+               u32 tiles_w = fb->pitches[0] >> (tile_size_shift - tile_h_shift);
+
                tiling = SCALER_CTL0_TILING_256B_OR_T;
 
-               pitch0 = (VC4_SET_FIELD(0, SCALER_PITCH0_TILE_Y_OFFSET),
-                         VC4_SET_FIELD(0, SCALER_PITCH0_TILE_WIDTH_L),
-                         VC4_SET_FIELD((vc4_state->src_w[0] + 31) >> 5,
-                                       SCALER_PITCH0_TILE_WIDTH_R));
+               pitch0 = (VC4_SET_FIELD(0, SCALER_PITCH0_TILE_Y_OFFSET) |
+                         VC4_SET_FIELD(0, SCALER_PITCH0_TILE_WIDTH_L) |
+                         VC4_SET_FIELD(tiles_w, SCALER_PITCH0_TILE_WIDTH_R));
                break;
+       }
+
        default:
                DRM_DEBUG_KMS("Unsupported FB tiling flag 0x%16llx",
                              (long long)fb->modifier);