crypto: caam - allow retrieving 'era' from register

The 'era' information can be retrieved from CAAM registers, so
introduce a caam_get_era_from_hw() function that gets it via register
reads in case the 'fsl,sec-era' property is not passed in the device
tree.

This function is based on the U-Boot implementation from
drivers/crypto/fsl/sec.c

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
index bee690ab8650bbac31e2154d30aadc452ba55937..a28868d5b2d001320f21e29aff8c59bc7978bb74 100644 (file)
--- a/drivers/crypto/caam/ctrl.c
+++ b/drivers/crypto/caam/ctrl.c
@@ -396,11 +396,56 @@ start_rng:
        clrsetbits_32(&r4tst->rtmctl, RTMCTL_PRGM, RTMCTL_SAMP_MODE_RAW_ES_SC);
 }
 
+static int caam_get_era_from_hw(struct caam_ctrl __iomem *ctrl)
+{
+       static const struct {
+               u16 ip_id;
+               u8 maj_rev;
+               u8 era;
+       } id[] = {
+               {0x0A10, 1, 1},
+               {0x0A10, 2, 2},
+               {0x0A12, 1, 3},
+               {0x0A14, 1, 3},
+               {0x0A14, 2, 4},
+               {0x0A16, 1, 4},
+               {0x0A10, 3, 4},
+               {0x0A11, 1, 4},
+               {0x0A18, 1, 4},
+               {0x0A11, 2, 5},
+               {0x0A12, 2, 5},
+               {0x0A13, 1, 5},
+               {0x0A1C, 1, 5}
+       };
+       u32 ccbvid, id_ms;
+       u8 maj_rev, era;
+       u16 ip_id;
+       int i;
+
+       ccbvid = rd_reg32(&ctrl->perfmon.ccb_id);
+       era = (ccbvid & CCBVID_ERA_MASK) >> CCBVID_ERA_SHIFT;
+       if (era)        /* This is '0' prior to CAAM ERA-6 */
+               return era;
+
+       id_ms = rd_reg32(&ctrl->perfmon.caam_id_ms);
+       ip_id = (id_ms & SECVID_MS_IPID_MASK) >> SECVID_MS_IPID_SHIFT;
+       maj_rev = (id_ms & SECVID_MS_MAJ_REV_MASK) >> SECVID_MS_MAJ_REV_SHIFT;
+
+       for (i = 0; i < ARRAY_SIZE(id); i++)
+               if (id[i].ip_id == ip_id && id[i].maj_rev == maj_rev)
+                       return id[i].era;
+
+       return -ENOTSUPP;
+}
+
 /**
  * caam_get_era() - Return the ERA of the SEC on SoC, based
- * on "sec-era" propery in the DTS. This property is updated by u-boot.
+ * on "sec-era" optional property in the DTS. This property is updated
+ * by u-boot.
+ * In case this property is not passed an attempt to retrieve the CAAM
+ * era via register reads will be made.
  **/
-static int caam_get_era(void)
+static int caam_get_era(struct caam_ctrl __iomem *ctrl)
 {
        struct device_node *caam_node;
        int ret;
@@ -410,7 +455,10 @@ static int caam_get_era(void)
        ret = of_property_read_u32(caam_node, "fsl,sec-era", &prop);
        of_node_put(caam_node);
 
-       return ret ? -ENOTSUPP : prop;
+       if (!ret)
+               return prop;
+       else
+               return caam_get_era_from_hw(ctrl);
 }
 
 static const struct of_device_id caam_match[] = {
@@ -622,7 +670,7 @@ static int caam_probe(struct platform_device *pdev)
                goto iounmap_ctrl;
        }
 
-       ctrlpriv->era = caam_get_era();
+       ctrlpriv->era = caam_get_era(ctrl);
 
        ret = of_platform_populate(nprop, caam_match, NULL, dev);
        if (ret) {

diff --git a/drivers/crypto/caam/regs.h b/drivers/crypto/caam/regs.h
index fee363865d88ea4faf4c82b7ece86e63b8a9c963..4fb91ba39c36b32a95ec3190d1296c9ec8a2eefa 100644 (file)
--- a/drivers/crypto/caam/regs.h
+++ b/drivers/crypto/caam/regs.h
@@ -312,11 +312,17 @@ struct caam_perfmon {
 
        /* Component Instantiation Parameters                   fe0-fff */
        u32 rtic_id;            /* RVID - RTIC Version ID       */
+#define CCBVID_ERA_MASK                0xff000000
+#define CCBVID_ERA_SHIFT       24
        u32 ccb_id;             /* CCBVID - CCB Version ID      */
        u32 cha_id_ms;          /* CHAVID - CHA Version ID Most Significant*/
        u32 cha_id_ls;          /* CHAVID - CHA Version ID Least Significant*/
        u32 cha_num_ms;         /* CHANUM - CHA Number Most Significant */
        u32 cha_num_ls;         /* CHANUM - CHA Number Least Significant*/
+#define SECVID_MS_IPID_MASK    0xffff0000
+#define SECVID_MS_IPID_SHIFT   16
+#define SECVID_MS_MAJ_REV_MASK 0x0000ff00
+#define SECVID_MS_MAJ_REV_SHIFT        8
        u32 caam_id_ms;         /* CAAMVID - CAAM Version ID MS */
        u32 caam_id_ls;         /* CAAMVID - CAAM Version ID LS */
 };