mmc: dw_mmc: avoid write to CDTHRCTL on older versions

Commit f1d2736c8156 (mmc: dw_mmc: control card read threshold) added
dw_mci_ctrl_rd_thld() with an unconditional write to the CDTHRCTL
register at offset 0x100. However before version 240a, the FIFO region
started at 0x100, so the write messes with the FIFO and completely
breaks the driver.

If the version id < 240A, return early from dw_mci_ctl_rd_thld() so as
not to hit this problem.

Fixes: f1d2736c8156 (mmc: dw_mmc: control card read threshold)
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: <stable@vger.kernel.org> # v3.13+
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index b4c30448566edc5921fd48665b11a7101cdc1024..67c04518ec4c38c0657e2fef713e1b6cd51348f6 100644 (file)
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -726,6 +726,13 @@ static void dw_mci_ctrl_rd_thld(struct dw_mci *host, struct mmc_data *data)
 
        WARN_ON(!(data->flags & MMC_DATA_READ));
 
+       /*
+        * CDTHRCTL doesn't exist prior to 240A (in fact that register offset is
+        * in the FIFO region, so we really shouldn't access it).
+        */
+       if (host->verid < DW_MMC_240A)
+               return;
+
        if (host->timing != MMC_TIMING_MMC_HS200 &&
            host->timing != MMC_TIMING_UHS_SDR104)
                goto disable;