MIPS: dts: ci20: Enable MMC in the devicetree

Now that we have support for JZ480 SoCs in the MMC driver,
let's enable it on the devicetree.

Acked-by: James Hogan <jhogan@kernel.org>
Tested-by: Mathieu Malaterre <malat@debian.org>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.co.uk>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts
index 38078594cf97ed5d7d6c99b8a2a09290aec2aba3..50cff3cbcc6de6386d11b07cdbe5a10b60ef976f 100644 (file)
--- a/arch/mips/boot/dts/ingenic/ci20.dts
+++ b/arch/mips/boot/dts/ingenic/ci20.dts
@@ -36,6 +36,28 @@
        clock-frequency = <48000000>;
 };
 
+&mmc0 {
+       status = "okay";
+
+       bus-width = <4>;
+       max-frequency = <50000000>;
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&pins_mmc0>;
+
+       cd-gpios = <&gpf 20 GPIO_ACTIVE_LOW>;
+};
+
+&mmc1 {
+       status = "okay";
+
+       bus-width = <4>;
+       max-frequency = <50000000>;
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&pins_mmc1>;
+};
+
 &uart0 {
        status = "okay";
 
@@ -203,4 +225,16 @@
                groups = "nemc-cs6";
                bias-disable;
        };
+
+       pins_mmc0: mmc0 {
+               function = "mmc0";
+               groups = "mmc0-1bit-e", "mmc0-4bit-e";
+               bias-disable;
+       };
+
+       pins_mmc1: mmc1 {
+               function = "mmc1";
+               groups = "mmc1-1bit-d", "mmc1-4bit-d";
+               bias-disable;
+       };
 };