}
}
-static int wm8955_reset(struct snd_soc_codec *codec)
+static int wm8955_reset(struct snd_soc_component *component)
{
- return snd_soc_write(codec, WM8955_RESET, 0);
+ return snd_soc_component_write(component, WM8955_RESET, 0);
}
struct pll_factors {
{ 11289600, 88200, 0, 31, },
};
-static int wm8955_configure_clocking(struct snd_soc_codec *codec)
+static int wm8955_configure_clocking(struct snd_soc_component *component)
{
- struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
+ struct wm8955_priv *wm8955 = snd_soc_component_get_drvdata(component);
int i, ret, val;
int clocking = 0;
int srate = 0;
/* We should never get here with an unsupported sample rate */
if (sr == -1) {
- dev_err(codec->dev, "Sample rate %dHz unsupported\n",
+ dev_err(component->dev, "Sample rate %dHz unsupported\n",
wm8955->fs);
WARN_ON(sr == -1);
return -EINVAL;
/* Use the last divider configuration we saw for the
* sample rate. */
- ret = wm8995_pll_factors(codec->dev, wm8955->mclk_rate,
+ ret = wm8995_pll_factors(component->dev, wm8955->mclk_rate,
clock_cfgs[sr].mclk, &pll);
if (ret != 0) {
- dev_err(codec->dev,
+ dev_err(component->dev,
"Unable to generate %dHz from %dHz MCLK\n",
wm8955->fs, wm8955->mclk_rate);
return -EINVAL;
}
- snd_soc_update_bits(codec, WM8955_PLL_CONTROL_1,
+ snd_soc_component_update_bits(component, WM8955_PLL_CONTROL_1,
WM8955_N_MASK | WM8955_K_21_18_MASK,
(pll.n << WM8955_N_SHIFT) |
pll.k >> 18);
- snd_soc_update_bits(codec, WM8955_PLL_CONTROL_2,
+ snd_soc_component_update_bits(component, WM8955_PLL_CONTROL_2,
WM8955_K_17_9_MASK,
(pll.k >> 9) & WM8955_K_17_9_MASK);
- snd_soc_update_bits(codec, WM8955_PLL_CONTROL_3,
+ snd_soc_component_update_bits(component, WM8955_PLL_CONTROL_3,
WM8955_K_8_0_MASK,
pll.k & WM8955_K_8_0_MASK);
if (pll.k)
- snd_soc_update_bits(codec, WM8955_PLL_CONTROL_4,
+ snd_soc_component_update_bits(component, WM8955_PLL_CONTROL_4,
WM8955_KEN, WM8955_KEN);
else
- snd_soc_update_bits(codec, WM8955_PLL_CONTROL_4,
+ snd_soc_component_update_bits(component, WM8955_PLL_CONTROL_4,
WM8955_KEN, 0);
if (pll.outdiv)
val = WM8955_PLL_RB;
/* Now start the PLL running */
- snd_soc_update_bits(codec, WM8955_CLOCKING_PLL,
+ snd_soc_component_update_bits(component, WM8955_CLOCKING_PLL,
WM8955_PLL_RB | WM8955_PLLOUTDIV2, val);
- snd_soc_update_bits(codec, WM8955_CLOCKING_PLL,
+ snd_soc_component_update_bits(component, WM8955_CLOCKING_PLL,
WM8955_PLLEN, WM8955_PLLEN);
}
srate = clock_cfgs[sr].usb | (clock_cfgs[sr].sr << WM8955_SR_SHIFT);
- snd_soc_update_bits(codec, WM8955_SAMPLE_RATE,
+ snd_soc_component_update_bits(component, WM8955_SAMPLE_RATE,
WM8955_USB | WM8955_SR_MASK, srate);
- snd_soc_update_bits(codec, WM8955_CLOCKING_PLL,
+ snd_soc_component_update_bits(component, WM8955_CLOCKING_PLL,
WM8955_MCLKSEL, clocking);
return 0;
static int wm8955_sysclk(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
- struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
+ struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
int ret = 0;
/* Always disable the clocks - if we're doing reconfiguration this
* avoids misclocking.
*/
- snd_soc_update_bits(codec, WM8955_POWER_MANAGEMENT_1,
+ snd_soc_component_update_bits(component, WM8955_POWER_MANAGEMENT_1,
WM8955_DIGENB, 0);
- snd_soc_update_bits(codec, WM8955_CLOCKING_PLL,
+ snd_soc_component_update_bits(component, WM8955_CLOCKING_PLL,
WM8955_PLL_RB | WM8955_PLLEN, 0);
switch (event) {
case SND_SOC_DAPM_POST_PMD:
break;
case SND_SOC_DAPM_PRE_PMU:
- ret = wm8955_configure_clocking(codec);
+ ret = wm8955_configure_clocking(component);
break;
default:
ret = -EINVAL;
static int deemph_settings[] = { 0, 32000, 44100, 48000 };
-static int wm8955_set_deemph(struct snd_soc_codec *codec)
+static int wm8955_set_deemph(struct snd_soc_component *component)
{
- struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
+ struct wm8955_priv *wm8955 = snd_soc_component_get_drvdata(component);
int val, i, best;
/* If we're using deemphasis select the nearest available sample
val = 0;
}
- dev_dbg(codec->dev, "Set deemphasis %d\n", val);
+ dev_dbg(component->dev, "Set deemphasis %d\n", val);
- return snd_soc_update_bits(codec, WM8955_DAC_CONTROL,
+ return snd_soc_component_update_bits(component, WM8955_DAC_CONTROL,
WM8955_DEEMPH_MASK, val);
}
static int wm8955_get_deemph(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
- struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
- struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
+ struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
+ struct wm8955_priv *wm8955 = snd_soc_component_get_drvdata(component);
ucontrol->value.integer.value[0] = wm8955->deemph;
return 0;
static int wm8955_put_deemph(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
- struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
- struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
+ struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
+ struct wm8955_priv *wm8955 = snd_soc_component_get_drvdata(component);
unsigned int deemph = ucontrol->value.integer.value[0];
if (deemph > 1)
wm8955->deemph = deemph;
- return wm8955_set_deemph(codec);
+ return wm8955_set_deemph(component);
}
static const char *bass_mode_text[] = {
struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai)
{
- struct snd_soc_codec *codec = dai->codec;
- struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
+ struct snd_soc_component *component = dai->component;
+ struct wm8955_priv *wm8955 = snd_soc_component_get_drvdata(component);
int ret;
int wl;
default:
return -EINVAL;
}
- snd_soc_update_bits(codec, WM8955_AUDIO_INTERFACE,
+ snd_soc_component_update_bits(component, WM8955_AUDIO_INTERFACE,
WM8955_WL_MASK, wl);
wm8955->fs = params_rate(params);
- wm8955_set_deemph(codec);
+ wm8955_set_deemph(component);
/* If the chip is clocked then disable the clocks and force a
* reconfiguration, otherwise DAPM will power up the
* clocks for us later. */
- ret = snd_soc_read(codec, WM8955_POWER_MANAGEMENT_1);
+ ret = snd_soc_component_read32(component, WM8955_POWER_MANAGEMENT_1);
if (ret < 0)
return ret;
if (ret & WM8955_DIGENB) {
- snd_soc_update_bits(codec, WM8955_POWER_MANAGEMENT_1,
+ snd_soc_component_update_bits(component, WM8955_POWER_MANAGEMENT_1,
WM8955_DIGENB, 0);
- snd_soc_update_bits(codec, WM8955_CLOCKING_PLL,
+ snd_soc_component_update_bits(component, WM8955_CLOCKING_PLL,
WM8955_PLL_RB | WM8955_PLLEN, 0);
- wm8955_configure_clocking(codec);
+ wm8955_configure_clocking(component);
}
return 0;
static int wm8955_set_sysclk(struct snd_soc_dai *dai, int clk_id,
unsigned int freq, int dir)
{
- struct snd_soc_codec *codec = dai->codec;
- struct wm8955_priv *priv = snd_soc_codec_get_drvdata(codec);
+ struct snd_soc_component *component = dai->component;
+ struct wm8955_priv *priv = snd_soc_component_get_drvdata(component);
int div;
switch (clk_id) {
div = 0;
}
- snd_soc_update_bits(codec, WM8955_SAMPLE_RATE,
+ snd_soc_component_update_bits(component, WM8955_SAMPLE_RATE,
WM8955_MCLKDIV2, div);
break;
static int wm8955_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
{
- struct snd_soc_codec *codec = dai->codec;
+ struct snd_soc_component *component = dai->component;
u16 aif = 0;
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
return -EINVAL;
}
- snd_soc_update_bits(codec, WM8955_AUDIO_INTERFACE,
+ snd_soc_component_update_bits(component, WM8955_AUDIO_INTERFACE,
WM8955_MS | WM8955_FORMAT_MASK | WM8955_BCLKINV |
WM8955_LRP, aif);
static int wm8955_digital_mute(struct snd_soc_dai *codec_dai, int mute)
{
- struct snd_soc_codec *codec = codec_dai->codec;
+ struct snd_soc_component *component = codec_dai->component;
int val;
if (mute)
else
val = 0;
- snd_soc_update_bits(codec, WM8955_DAC_CONTROL, WM8955_DACMU, val);
+ snd_soc_component_update_bits(component, WM8955_DAC_CONTROL, WM8955_DACMU, val);
return 0;
}
-static int wm8955_set_bias_level(struct snd_soc_codec *codec,
+static int wm8955_set_bias_level(struct snd_soc_component *component,
enum snd_soc_bias_level level)
{
- struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
+ struct wm8955_priv *wm8955 = snd_soc_component_get_drvdata(component);
int ret;
switch (level) {
case SND_SOC_BIAS_PREPARE:
/* VMID resistance 2*50k */
- snd_soc_update_bits(codec, WM8955_POWER_MANAGEMENT_1,
+ snd_soc_component_update_bits(component, WM8955_POWER_MANAGEMENT_1,
WM8955_VMIDSEL_MASK,
0x1 << WM8955_VMIDSEL_SHIFT);
/* Default bias current */
- snd_soc_update_bits(codec, WM8955_ADDITIONAL_CONTROL_1,
+ snd_soc_component_update_bits(component, WM8955_ADDITIONAL_CONTROL_1,
WM8955_VSEL_MASK,
0x2 << WM8955_VSEL_SHIFT);
break;
case SND_SOC_BIAS_STANDBY:
- if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
+ if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
ret = regulator_bulk_enable(ARRAY_SIZE(wm8955->supplies),
wm8955->supplies);
if (ret != 0) {
- dev_err(codec->dev,
+ dev_err(component->dev,
"Failed to enable supplies: %d\n",
ret);
return ret;
regcache_sync(wm8955->regmap);
/* Enable VREF and VMID */
- snd_soc_update_bits(codec, WM8955_POWER_MANAGEMENT_1,
+ snd_soc_component_update_bits(component, WM8955_POWER_MANAGEMENT_1,
WM8955_VREF |
WM8955_VMIDSEL_MASK,
WM8955_VREF |
msleep(500);
/* High resistance VROI to maintain outputs */
- snd_soc_update_bits(codec,
+ snd_soc_component_update_bits(component,
WM8955_ADDITIONAL_CONTROL_3,
WM8955_VROI, WM8955_VROI);
}
/* Maintain VMID with 2*250k */
- snd_soc_update_bits(codec, WM8955_POWER_MANAGEMENT_1,
+ snd_soc_component_update_bits(component, WM8955_POWER_MANAGEMENT_1,
WM8955_VMIDSEL_MASK,
0x2 << WM8955_VMIDSEL_SHIFT);
/* Minimum bias current */
- snd_soc_update_bits(codec, WM8955_ADDITIONAL_CONTROL_1,
+ snd_soc_component_update_bits(component, WM8955_ADDITIONAL_CONTROL_1,
WM8955_VSEL_MASK, 0);
break;
case SND_SOC_BIAS_OFF:
/* Low resistance VROI to help discharge */
- snd_soc_update_bits(codec,
+ snd_soc_component_update_bits(component,
WM8955_ADDITIONAL_CONTROL_3,
WM8955_VROI, 0);
/* Turn off VMID and VREF */
- snd_soc_update_bits(codec, WM8955_POWER_MANAGEMENT_1,
+ snd_soc_component_update_bits(component, WM8955_POWER_MANAGEMENT_1,
WM8955_VREF |
WM8955_VMIDSEL_MASK, 0);
.ops = &wm8955_dai_ops,
};
-static int wm8955_probe(struct snd_soc_codec *codec)
+static int wm8955_probe(struct snd_soc_component *component)
{
- struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
- struct wm8955_pdata *pdata = dev_get_platdata(codec->dev);
+ struct wm8955_priv *wm8955 = snd_soc_component_get_drvdata(component);
+ struct wm8955_pdata *pdata = dev_get_platdata(component->dev);
int ret, i;
for (i = 0; i < ARRAY_SIZE(wm8955->supplies); i++)
wm8955->supplies[i].supply = wm8955_supply_names[i];
- ret = devm_regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8955->supplies),
+ ret = devm_regulator_bulk_get(component->dev, ARRAY_SIZE(wm8955->supplies),
wm8955->supplies);
if (ret != 0) {
- dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
+ dev_err(component->dev, "Failed to request supplies: %d\n", ret);
return ret;
}
ret = regulator_bulk_enable(ARRAY_SIZE(wm8955->supplies),
wm8955->supplies);
if (ret != 0) {
- dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
+ dev_err(component->dev, "Failed to enable supplies: %d\n", ret);
return ret;
}
- ret = wm8955_reset(codec);
+ ret = wm8955_reset(component);
if (ret < 0) {
- dev_err(codec->dev, "Failed to issue reset: %d\n", ret);
+ dev_err(component->dev, "Failed to issue reset: %d\n", ret);
goto err_enable;
}
/* Change some default settings - latch VU and enable ZC */
- snd_soc_update_bits(codec, WM8955_LEFT_DAC_VOLUME,
+ snd_soc_component_update_bits(component, WM8955_LEFT_DAC_VOLUME,
WM8955_LDVU, WM8955_LDVU);
- snd_soc_update_bits(codec, WM8955_RIGHT_DAC_VOLUME,
+ snd_soc_component_update_bits(component, WM8955_RIGHT_DAC_VOLUME,
WM8955_RDVU, WM8955_RDVU);
- snd_soc_update_bits(codec, WM8955_LOUT1_VOLUME,
+ snd_soc_component_update_bits(component, WM8955_LOUT1_VOLUME,
WM8955_LO1VU | WM8955_LO1ZC,
WM8955_LO1VU | WM8955_LO1ZC);
- snd_soc_update_bits(codec, WM8955_ROUT1_VOLUME,
+ snd_soc_component_update_bits(component, WM8955_ROUT1_VOLUME,
WM8955_RO1VU | WM8955_RO1ZC,
WM8955_RO1VU | WM8955_RO1ZC);
- snd_soc_update_bits(codec, WM8955_LOUT2_VOLUME,
+ snd_soc_component_update_bits(component, WM8955_LOUT2_VOLUME,
WM8955_LO2VU | WM8955_LO2ZC,
WM8955_LO2VU | WM8955_LO2ZC);
- snd_soc_update_bits(codec, WM8955_ROUT2_VOLUME,
+ snd_soc_component_update_bits(component, WM8955_ROUT2_VOLUME,
WM8955_RO2VU | WM8955_RO2ZC,
WM8955_RO2VU | WM8955_RO2ZC);
- snd_soc_update_bits(codec, WM8955_MONOOUT_VOLUME,
+ snd_soc_component_update_bits(component, WM8955_MONOOUT_VOLUME,
WM8955_MOZC, WM8955_MOZC);
/* Also enable adaptive bass boost by default */
- snd_soc_update_bits(codec, WM8955_BASS_CONTROL, WM8955_BB, WM8955_BB);
+ snd_soc_component_update_bits(component, WM8955_BASS_CONTROL, WM8955_BB, WM8955_BB);
/* Set platform data values */
if (pdata) {
if (pdata->out2_speaker)
- snd_soc_update_bits(codec, WM8955_ADDITIONAL_CONTROL_2,
+ snd_soc_component_update_bits(component, WM8955_ADDITIONAL_CONTROL_2,
WM8955_ROUT2INV, WM8955_ROUT2INV);
if (pdata->monoin_diff)
- snd_soc_update_bits(codec, WM8955_MONO_OUT_MIX_1,
+ snd_soc_component_update_bits(component, WM8955_MONO_OUT_MIX_1,
WM8955_DMEN, WM8955_DMEN);
}
- snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_STANDBY);
+ snd_soc_component_force_bias_level(component, SND_SOC_BIAS_STANDBY);
/* Bias level configuration will have done an extra enable */
regulator_bulk_disable(ARRAY_SIZE(wm8955->supplies), wm8955->supplies);
return ret;
}
-static const struct snd_soc_codec_driver soc_codec_dev_wm8955 = {
- .probe = wm8955_probe,
- .set_bias_level = wm8955_set_bias_level,
- .suspend_bias_off = true,
-
- .component_driver = {
- .controls = wm8955_snd_controls,
- .num_controls = ARRAY_SIZE(wm8955_snd_controls),
- .dapm_widgets = wm8955_dapm_widgets,
- .num_dapm_widgets = ARRAY_SIZE(wm8955_dapm_widgets),
- .dapm_routes = wm8955_dapm_routes,
- .num_dapm_routes = ARRAY_SIZE(wm8955_dapm_routes),
- },
+static const struct snd_soc_component_driver soc_component_dev_wm8955 = {
+ .probe = wm8955_probe,
+ .set_bias_level = wm8955_set_bias_level,
+ .controls = wm8955_snd_controls,
+ .num_controls = ARRAY_SIZE(wm8955_snd_controls),
+ .dapm_widgets = wm8955_dapm_widgets,
+ .num_dapm_widgets = ARRAY_SIZE(wm8955_dapm_widgets),
+ .dapm_routes = wm8955_dapm_routes,
+ .num_dapm_routes = ARRAY_SIZE(wm8955_dapm_routes),
+ .suspend_bias_off = 1,
+ .idle_bias_on = 1,
+ .use_pmdown_time = 1,
+ .endianness = 1,
+ .non_legacy_dai_naming = 1,
};
static const struct regmap_config wm8955_regmap = {
i2c_set_clientdata(i2c, wm8955);
- ret = snd_soc_register_codec(&i2c->dev,
- &soc_codec_dev_wm8955, &wm8955_dai, 1);
+ ret = devm_snd_soc_register_component(&i2c->dev,
+ &soc_component_dev_wm8955, &wm8955_dai, 1);
return ret;
}
-static int wm8955_i2c_remove(struct i2c_client *client)
-{
- snd_soc_unregister_codec(&client->dev);
-
- return 0;
-}
-
static const struct i2c_device_id wm8955_i2c_id[] = {
{ "wm8955", 0 },
{ }
.name = "wm8955",
},
.probe = wm8955_i2c_probe,
- .remove = wm8955_i2c_remove,
.id_table = wm8955_i2c_id,
};
projects / openwrt / staging / blogic.git / commitdiff