We get an MIB interrupt when we hit certain PHY error counter
thresholds. If ANI is disabled but the MIB interrupt is enabled
we'll keep around the old MIB interrupt causes.
Since ath9k disables the MIB interrupt when ANI is disabled
this is not a fix, but more of a sanity fix in case we ever
need the MIB interrupt enabled but disabling ANI.
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
/* Clear the mib counters and save them in the stats */
ath9k_hw_update_mibstats(ah, &ah->ah_mibStats);
- if (!DO_ANI(ah))
+ if (!DO_ANI(ah)) {
+ /*
+ * We must always clear the interrupt cause by
+ * resetting the phy error regs.
+ */
+ REG_WRITE(ah, AR_PHY_ERR_1, 0);
+ REG_WRITE(ah, AR_PHY_ERR_2, 0);
return;
+ }
/* NB: these are not reset-on-read */
phyCnt1 = REG_READ(ah, AR_PHY_ERR_1);