net: hns3: Add "qos prio map" info query function
authorliuzhongzhu <liuzhongzhu@huawei.com>
Thu, 22 Nov 2018 14:09:47 +0000 (14:09 +0000)
committerDavid S. Miller <davem@davemloft.net>
Sat, 24 Nov 2018 01:29:00 +0000 (17:29 -0800)
This patch prints qos priority map information.

debugfs command:
echo dump qos pri map > cmd

Sample Command:
root@(none)# echo dump qos pri map > cmd
hns3 0000:7d:00.0: dump qos pri map
hns3 0000:7d:00.0: vlan_to_pri: 0x0
hns3 0000:7d:00.0: pri_0_to_tc: 0x0
hns3 0000:7d:00.0: pri_1_to_tc: 0x0
hns3 0000:7d:00.0: pri_2_to_tc: 0x0
hns3 0000:7d:00.0: pri_3_to_tc: 0x0
hns3 0000:7d:00.0: pri_4_to_tc: 0x0
hns3 0000:7d:00.0: pri_5_to_tc: 0x0
hns3 0000:7d:00.0: pri_6_to_tc: 0x0
hns3 0000:7d:00.0: pri_7_to_tc: 0x0
root@(none)#

Signed-off-by: liuzhongzhu <liuzhongzhu@huawei.com>
Signed-off-by: Salil Mehta <salil.mehta@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h [new file with mode: 0644]

index 62586958a31160b8d9d37d95ac4ea4bd98274823..ce284c8ddefcd7457c50030934d88de3f8ba585e 100644 (file)
@@ -133,6 +133,7 @@ static void hns3_dbg_help(struct hnae3_handle *h)
        dev_info(&h->pdev->dev, "dump tc\n");
        dev_info(&h->pdev->dev, "dump tm\n");
        dev_info(&h->pdev->dev, "dump qos pause cfg\n");
+       dev_info(&h->pdev->dev, "dump qos pri map\n");
 }
 
 static ssize_t hns3_dbg_cmd_read(struct file *filp, char __user *buffer,
index 37b312bd3bef5ac7716522079b6e66840605ae84..477acf7299bae6f218e48d1e50a02b7d0a5295ee 100644 (file)
@@ -3,6 +3,7 @@
 
 #include <linux/device.h>
 
+#include "hclge_debugfs.h"
 #include "hclge_cmd.h"
 #include "hclge_main.h"
 #include "hclge_tm.h"
@@ -265,6 +266,34 @@ static void hclge_dbg_dump_qos_pause_cfg(struct hclge_dev *hdev)
                 pause_param->pause_trans_time);
 }
 
+static void hclge_dbg_dump_qos_pri_map(struct hclge_dev *hdev)
+{
+       struct hclge_qos_pri_map_cmd *pri_map;
+       struct hclge_desc desc;
+       int ret;
+
+       hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_PRI_TO_TC_MAPPING, true);
+
+       ret = hclge_cmd_send(&hdev->hw, &desc, 1);
+       if (ret) {
+               dev_err(&hdev->pdev->dev,
+                       "dump qos pri map fail, status is %d.\n", ret);
+               return;
+       }
+
+       pri_map = (struct hclge_qos_pri_map_cmd *)desc.data;
+       dev_info(&hdev->pdev->dev, "dump qos pri map\n");
+       dev_info(&hdev->pdev->dev, "vlan_to_pri: 0x%x\n", pri_map->vlan_pri);
+       dev_info(&hdev->pdev->dev, "pri_0_to_tc: 0x%x\n", pri_map->pri0_tc);
+       dev_info(&hdev->pdev->dev, "pri_1_to_tc: 0x%x\n", pri_map->pri1_tc);
+       dev_info(&hdev->pdev->dev, "pri_2_to_tc: 0x%x\n", pri_map->pri2_tc);
+       dev_info(&hdev->pdev->dev, "pri_3_to_tc: 0x%x\n", pri_map->pri3_tc);
+       dev_info(&hdev->pdev->dev, "pri_4_to_tc: 0x%x\n", pri_map->pri4_tc);
+       dev_info(&hdev->pdev->dev, "pri_5_to_tc: 0x%x\n", pri_map->pri5_tc);
+       dev_info(&hdev->pdev->dev, "pri_6_to_tc: 0x%x\n", pri_map->pri6_tc);
+       dev_info(&hdev->pdev->dev, "pri_7_to_tc: 0x%x\n", pri_map->pri7_tc);
+}
+
 static void hclge_dbg_fd_tcam_read(struct hclge_dev *hdev, u8 stage,
                                   bool sel_x, u32 loc)
 {
@@ -332,6 +361,8 @@ int hclge_dbg_run_cmd(struct hnae3_handle *handle, char *cmd_buf)
                hclge_dbg_dump_tm(hdev);
        } else if (strncmp(cmd_buf, "dump qos pause cfg", 18) == 0) {
                hclge_dbg_dump_qos_pause_cfg(hdev);
+       } else if (strncmp(cmd_buf, "dump qos pri map", 16) == 0) {
+               hclge_dbg_dump_qos_pri_map(hdev);
        } else {
                dev_info(&hdev->pdev->dev, "unknown command\n");
                return -EINVAL;
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h
new file mode 100644 (file)
index 0000000..50fd0b1
--- /dev/null
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/* Copyright (c) 2018-2019 Hisilicon Limited. */
+
+#ifndef __HCLGE_DEBUGFS_H
+#define __HCLGE_DEBUGFS_H
+
+#pragma pack(1)
+
+struct hclge_qos_pri_map_cmd {
+       u8 pri0_tc  : 4,
+          pri1_tc  : 4;
+       u8 pri2_tc  : 4,
+          pri3_tc  : 4;
+       u8 pri4_tc  : 4,
+          pri5_tc  : 4;
+       u8 pri6_tc  : 4,
+          pri7_tc  : 4;
+       u8 vlan_pri : 4,
+          rev      : 4;
+};
+
+#pragma pack()
+#endif