drm: Add the PSR SU granularity registers offsets
authorJosé Roberto de Souza <jose.souza@intel.com>
Tue, 4 Dec 2018 00:34:01 +0000 (16:34 -0800)
committerJosé Roberto de Souza <jose.souza@intel.com>
Tue, 4 Dec 2018 20:12:33 +0000 (12:12 -0800)
Source is required to comply to sink SU granularity when
DP_PSR2_SU_GRANULARITY_REQUIRED is set in DP_PSR_CAPS,
so adding the registers offsets.

v2: Also adding DP_PSR2_SU_Y_GRANULARITY(Rodrigo)

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181204003403.23361-7-jose.souza@intel.com
include/drm/drm_dp_helper.h

index c33e89c51d9f4a8d5ad9d66222c1d93747730c9a..18cfde45b8ed4add3222456cabc1cbdcfbe957c2 100644 (file)
 # define DP_PSR_SETUP_TIME_SHIFT            1
 # define DP_PSR2_SU_Y_COORDINATE_REQUIRED   (1 << 4)  /* eDP 1.4a */
 # define DP_PSR2_SU_GRANULARITY_REQUIRED    (1 << 5)  /* eDP 1.4b */
+
+#define DP_PSR2_SU_X_GRANULARITY           0x072 /* eDP 1.4b */
+#define DP_PSR2_SU_Y_GRANULARITY           0x074 /* eDP 1.4b */
+
 /*
  * 0x80-0x8f describe downstream port capabilities, but there are two layouts
  * based on whether DP_DETAILED_CAP_INFO_AVAILABLE was set.  If it was not,