ARM: at91/dt: describe rgmii ethernet phy connected to sama5d3xek boards
authorBoris BREZILLON <boris.brezillon@free-electrons.com>
Thu, 10 Jul 2014 19:59:53 +0000 (21:59 +0200)
committerNicolas Ferre <nicolas.ferre@atmel.com>
Mon, 1 Sep 2014 17:29:03 +0000 (19:29 +0200)
Add ethernet-phy nodes and specify phy interrupt (connected to pin PB25)
and board specific timing configs.

Atmel has two different HW designs for its CPU modules: the first one
(produced by Embest) is connecting PHYAD[0-2] pins to pull up resistors
and the other one (produced by Ronetix) is connecting PHYAD0 to a pull up
resistor and PHYAD[1-2] to pull down resistors.
As a result, Ronetix design will have its PHY available at address 0x1 and
Embest design at 0x7.
By defining both phys we're letting the phy core detect the one actually
available on the MDIO bus.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Tested-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
arch/arm/boot/dts/sama5d3xcm.dtsi

index f7d8583eef821938c876d4a4dbbeb26be6f7aa3a..962dc28dc37b9bbc4a3427c4e127d26fc689bf63 100644 (file)
 
                        macb0: ethernet@f0028000 {
                                phy-mode = "rgmii";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               ethernet-phy@1 {
+                                       reg = <0x1>;
+                                       interrupt-parent = <&pioB>;
+                                       interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
+                                       txen-skew-ps = <800>;
+                                       txc-skew-ps = <3000>;
+                                       rxdv-skew-ps = <400>;
+                                       rxc-skew-ps = <3000>;
+                                       rxd0-skew-ps = <400>;
+                                       rxd1-skew-ps = <400>;
+                                       rxd2-skew-ps = <400>;
+                                       rxd3-skew-ps = <400>;
+                               };
+
+                               ethernet-phy@7 {
+                                       reg = <0x7>;
+                                       interrupt-parent = <&pioB>;
+                                       interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
+                                       txen-skew-ps = <800>;
+                                       txc-skew-ps = <3000>;
+                                       rxdv-skew-ps = <400>;
+                                       rxc-skew-ps = <3000>;
+                                       rxd0-skew-ps = <400>;
+                                       rxd1-skew-ps = <400>;
+                                       rxd2-skew-ps = <400>;
+                                       rxd3-skew-ps = <400>;
+                               };
                        };
 
                        pmc: pmc@fffffc00 {