Merge branch 'drm-next-4.15' of git://people.freedesktop.org/~agd5f/linux into drm...
authorDave Airlie <airlied@redhat.com>
Wed, 27 Sep 2017 22:37:02 +0000 (08:37 +1000)
committerDave Airlie <airlied@redhat.com>
Wed, 27 Sep 2017 22:37:02 +0000 (08:37 +1000)
First feature pull for 4.15.  Highlights:
- Per VM BO support
- Lots of powerplay cleanups
- Powerplay support for CI
- pasid mgr for kfd
- interrupt infrastructure for recoverable page faults
- SR-IOV fixes
- initial GPU reset for vega10
- prime mmap support
- ttm page table debugging improvements
- lots of bug fixes

* 'drm-next-4.15' of git://people.freedesktop.org/~agd5f/linux: (232 commits)
  drm/amdgpu: clarify license in amdgpu_trace_points.c
  drm/amdgpu: Add gem_prime_mmap support
  drm/amd/powerplay: delete dead code in smumgr
  drm/amd/powerplay: delete SMUM_FIELD_MASK
  drm/amd/powerplay: delete SMUM_WAIT_INDIRECT_FIELD
  drm/amd/powerplay: delete SMUM_READ_FIELD
  drm/amd/powerplay: delete SMUM_SET_FIELD
  drm/amd/powerplay: delete SMUM_READ_VFPF_INDIRECT_FIELD
  drm/amd/powerplay: delete SMUM_WRITE_VFPF_INDIRECT_FIELD
  drm/amd/powerplay: delete SMUM_WRITE_FIELD
  drm/amd/powerplay: delete SMU_WRITE_INDIRECT_FIELD
  drm/amd/powerplay: move macros to hwmgr.h
  drm/amd/powerplay: move PHM_WAIT_VFPF_INDIRECT_FIELD to hwmgr.h
  drm/amd/powerplay: move SMUM_WAIT_VFPF_INDIRECT_FIELD_UNEQUAL to hwmgr.h
  drm/amd/powerplay: move SMUM_WAIT_INDIRECT_FIELD_UNEQUAL to hwmgr.h
  drm/amd/powerplay: add new helper functions in hwmgr.h
  drm/amd/powerplay: use SMU_IND_INDEX/DATA_11 pair
  drm/amd/powerplay: refine powerplay code.
  drm/amd/powerplay: delete dead code in hwmgr.h
  drm/amd/powerplay: refine interface in struct pp_smumgr_func
  ...

1  2 
drivers/gpu/drm/Kconfig
drivers/gpu/drm/Makefile
drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h

Simple merge
Simple merge
index 3b0f2ec6eec7d257f5ccb956ff2b318973c5c4f7,521a51b37f5d5c2fa460605b1d4aa070d3c2a06e..bd67f4cb8e6ce57f6ebec1cd8b654cc87aa38718
@@@ -50,8 -50,10 +50,10 @@@ struct amdgpu_mn 
        struct hlist_node       node;
  
        /* objects protected by lock */
-       struct mutex            lock;
+       struct rw_semaphore     lock;
 -      struct rb_root          objects;
 +      struct rb_root_cached   objects;
+       struct mutex            read_lock;
+       atomic_t                recursion;
  };
  
  struct amdgpu_mn_node {
@@@ -74,10 -76,10 +76,10 @@@ static void amdgpu_mn_destroy(struct wo
        struct amdgpu_bo *bo, *next_bo;
  
        mutex_lock(&adev->mn_lock);
-       mutex_lock(&rmn->lock);
+       down_write(&rmn->lock);
        hash_del(&rmn->node);
 -      rbtree_postorder_for_each_entry_safe(node, next_node, &rmn->objects,
 -                                           it.rb) {
 +      rbtree_postorder_for_each_entry_safe(node, next_node,
 +                                           &rmn->objects.rb_root, it.rb) {
                list_for_each_entry_safe(bo, next_bo, &node->bos, mn_list) {
                        bo->mn = NULL;
                        list_del_init(&bo->mn_list);
@@@ -185,7 -271,9 +241,8 @@@ static void amdgpu_mn_invalidate_range_
  
  static const struct mmu_notifier_ops amdgpu_mn_ops = {
        .release = amdgpu_mn_release,
 -      .invalidate_page = amdgpu_mn_invalidate_page,
        .invalidate_range_start = amdgpu_mn_invalidate_range_start,
+       .invalidate_range_end = amdgpu_mn_invalidate_range_end,
  };
  
  /**
@@@ -220,8 -308,10 +277,10 @@@ struct amdgpu_mn *amdgpu_mn_get(struct 
        rmn->adev = adev;
        rmn->mm = mm;
        rmn->mn.ops = &amdgpu_mn_ops;
-       mutex_init(&rmn->lock);
+       init_rwsem(&rmn->lock);
 -      rmn->objects = RB_ROOT;
 +      rmn->objects = RB_ROOT_CACHED;
+       mutex_init(&rmn->read_lock);
+       atomic_set(&rmn->recursion, 0);
  
        r = __mmu_notifier_register(&rmn->mn, mm);
        if (r)
index 7ef6c28a34d991a2bba6f20224284072330c22d1,1086f039d8e3eeba6bdb9a433f4f37959aaa782d..15a28578d4585bcb1523b70ed24d34cfcf7cb71c
@@@ -818,7 -814,7 +814,6 @@@ int amdgpu_ttm_bind(struct ttm_buffer_o
        struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev);
        struct ttm_tt *ttm = bo->ttm;
        struct ttm_mem_reg tmp;
--
        struct ttm_placement placement;
        struct ttm_place placements;
        int r;
index bd20ff018512271b79d9dac6c40b21693ea54f6b,8fcc743dfa8675393dd2385147b0a797e41a62a9..bbcc670382035b9c9a1c9416fe8d48054c68b0cf
@@@ -2586,15 -2734,27 +2734,28 @@@ void amdgpu_vm_fini(struct amdgpu_devic
  {
        struct amdgpu_bo_va_mapping *mapping, *tmp;
        bool prt_fini_needed = !!adev->gart.gart_funcs->set_prt;
+       u64 fault;
        int i;
  
+       /* Clear pending page faults from IH when the VM is destroyed */
+       while (kfifo_get(&vm->faults, &fault))
+               amdgpu_ih_clear_fault(adev, fault);
+       if (vm->pasid) {
+               unsigned long flags;
+               spin_lock_irqsave(&adev->vm_manager.pasid_lock, flags);
+               idr_remove(&adev->vm_manager.pasid_idr, vm->pasid);
+               spin_unlock_irqrestore(&adev->vm_manager.pasid_lock, flags);
+       }
        amd_sched_entity_fini(vm->entity.sched, &vm->entity);
  
 -      if (!RB_EMPTY_ROOT(&vm->va)) {
 +      if (!RB_EMPTY_ROOT(&vm->va.rb_root)) {
                dev_err(adev->dev, "still active bo inside vm\n");
        }
 -      rbtree_postorder_for_each_entry_safe(mapping, tmp, &vm->va, rb) {
 +      rbtree_postorder_for_each_entry_safe(mapping, tmp,
 +                                           &vm->va.rb_root, rb) {
                list_del(&mapping->list);
                amdgpu_vm_it_remove(mapping, &vm->va);
                kfree(mapping);
index 6716355403ec5fefd4ce2438587ea6cdbe6c22b9,447ed6e7e5862e5bf17dbb02bdeaf47b17a2e232..0af090667dfcdfbcbef0f2c30ee8043ab2a54a0d
@@@ -108,17 -112,21 +112,21 @@@ struct amdgpu_vm_bo_base 
  };
  
  struct amdgpu_vm_pt {
-       struct amdgpu_bo        *bo;
-       uint64_t                addr;
+       struct amdgpu_vm_bo_base        base;
+       uint64_t                        addr;
  
        /* array of page tables, one for each directory entry */
-       struct amdgpu_vm_pt     *entries;
-       unsigned                last_entry_used;
+       struct amdgpu_vm_pt             *entries;
+       unsigned                        last_entry_used;
  };
  
+ #define AMDGPU_VM_FAULT(pasid, addr) (((u64)(pasid) << 48) | (addr))
+ #define AMDGPU_VM_FAULT_PASID(fault) ((u64)(fault) >> 48)
+ #define AMDGPU_VM_FAULT_ADDR(fault)  ((u64)(fault) & 0xfffffffff000ULL)
  struct amdgpu_vm {
        /* tree of virtual addresses mapped */
 -      struct rb_root          va;
 +      struct rb_root_cached   va;
  
        /* protecting invalidated */
        spinlock_t              status_lock;