thermal: exynos: remove test_mux pdata field

Replace pdata->test_mux check in get_con_reg() by explicitly
checking for SoC type.

Also since the used pdata->test_mux value is always identical
use it directly and remove pdata->test_mux completely.

There should be no functional changes caused by this patch.

Cc: Amit Daniel Kachhap <amit.daniel@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>

diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
index 65eeeccff78b4c236fec5a729e8c657bcc88cb50..2fcb4cdf8532881a1eb5719cd0401d227bf2622e 100644 (file)
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -193,8 +193,9 @@ static u32 get_con_reg(struct exynos_tmu_data *data, u32 con)
 {
        struct exynos_tmu_platform_data *pdata = data->pdata;
 
-       if (pdata->test_mux)
-               con |= (pdata->test_mux << EXYNOS4412_MUX_ADDR_SHIFT);
+       if (data->soc == SOC_ARCH_EXYNOS4412 ||
+           data->soc == SOC_ARCH_EXYNOS3250)
+               con |= (EXYNOS4412_MUX_ADDR_VALUE << EXYNOS4412_MUX_ADDR_SHIFT);
 
        con &= ~(EXYNOS_TMU_REF_VOLTAGE_MASK << EXYNOS_TMU_REF_VOLTAGE_SHIFT);
        con |= pdata->reference_voltage << EXYNOS_TMU_REF_VOLTAGE_SHIFT;

diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
index 2eb4cb96f28fe53773b4335ca38fee00d2791ff6..8de0f82549472d5cf9083d7ca936d76d4db8f8d2 100644 (file)
--- a/drivers/thermal/samsung/exynos_tmu.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -89,7 +89,6 @@ enum soc_type {
  * @first_point_trim: temp value of the first point trimming
  * @second_point_trim: temp value of the second point trimming
  * @default_temp_offset: default temperature offset in case of no trimming
- * @test_mux; information if SoC supports test MUX
  * @cal_type: calibration type for temperature
  * @freq_clip_table: Table representing frequency reduction percentage.
  * @freq_tab_count: Count of the above table as frequency reduction may
@@ -115,7 +114,6 @@ struct exynos_tmu_platform_data {
        u8 first_point_trim;
        u8 second_point_trim;
        u8 default_temp_offset;
-       u8 test_mux;
 
        enum calibration_type cal_type;
        enum soc_type type;

diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
index d90b050a7ceb19515d0c82900c0c91d7ba364423..708c3e146e89efd196baa16ce86e48f1e25f7cc5 100644 (file)
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -109,7 +109,6 @@ struct exynos_tmu_init_data const exynos3250_default_tmu_data = {
                {
                        EXYNOS3250_TMU_DATA,
                        .type = SOC_ARCH_EXYNOS3250,
-                       .test_mux = EXYNOS4412_MUX_ADDR_VALUE,
                },
        },
        .tmu_count = 1,
@@ -160,7 +159,6 @@ struct exynos_tmu_init_data const exynos4412_default_tmu_data = {
                {
                        EXYNOS4412_TMU_DATA,
                        .type = SOC_ARCH_EXYNOS4412,
-                       .test_mux = EXYNOS4412_MUX_ADDR_VALUE,
                },
        },
        .tmu_count = 1,