PCI: mobiveil: Mask out hardcoded bits in inbound/outbound windows setup

The lower 10 bits of window size field are hardcoded to zero in HW so
they can't really be changed but the lower 10-bit of PAB_AXI_AMAP_CTRL
register are used for control fields, so while programming inbound and
outbout windows decoding we should mask out the lower 10-bit of window
size to prevent overriding the control bits.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>

diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c
index 7d18e5976fc16d1704f5e4b59f372d9122c5a8c1..a9559c68ece0e6086309233825457bdd2a31d644 100644 (file)
--- a/drivers/pci/controller/pcie-mobiveil.c
+++ b/drivers/pci/controller/pcie-mobiveil.c
@@ -474,7 +474,7 @@ static void program_ib_windows(struct mobiveil_pcie *pcie, int win_num,
        value = csr_readl(pcie, PAB_PEX_AMAP_CTRL(win_num));
        value &= ~(AMAP_CTRL_TYPE_MASK << AMAP_CTRL_TYPE_SHIFT | WIN_SIZE_MASK);
        value |= type << AMAP_CTRL_TYPE_SHIFT | 1 << AMAP_CTRL_EN_SHIFT |
-                lower_32_bits(size64);
+                (lower_32_bits(size64) & WIN_SIZE_MASK);
        csr_writel(pcie, value, PAB_PEX_AMAP_CTRL(win_num));
 
        csr_writel(pcie, upper_32_bits(size64),
@@ -509,7 +509,7 @@ static void program_ob_windows(struct mobiveil_pcie *pcie, int win_num,
        value = csr_readl(pcie, PAB_AXI_AMAP_CTRL(win_num));
        value &= ~(WIN_TYPE_MASK << WIN_TYPE_SHIFT | WIN_SIZE_MASK);
        value |= 1 << WIN_ENABLE_SHIFT | type << WIN_TYPE_SHIFT |
-                lower_32_bits(size64);
+                (lower_32_bits(size64) & WIN_SIZE_MASK);
        csr_writel(pcie, value, PAB_AXI_AMAP_CTRL(win_num));
 
        csr_writel(pcie, upper_32_bits(size64), PAB_EXT_AXI_AMAP_SIZE(win_num));