MIPS: microMIPS: Fix incorrect mask in insn_table_MM
authorGustavo A. R. Silva <garsilva@embeddedor.com>
Tue, 31 Oct 2017 05:35:03 +0000 (00:35 -0500)
committerJames Hogan <jhogan@kernel.org>
Wed, 1 Nov 2017 00:09:16 +0000 (00:09 +0000)
It seems that this is a typo error and the proper bit masking is
"RT | RS" instead of "RS | RS".

This issue was detected with the help of Coccinelle.

Fixes: d6b3314b49e1 ("MIPS: uasm: Add lh uam instruction")
Reported-by: Julia Lawall <julia.lawall@lip6.fr>
Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com>
Reviewed-by: James Hogan <jhogan@kernel.org>
Cc: <stable@vger.kernel.org> # 3.16+
Patchwork: https://patchwork.linux-mips.org/patch/17551/
Signed-off-by: James Hogan <jhogan@kernel.org>
arch/mips/mm/uasm-micromips.c

index c28ff53c8da084feb3c100ca49a0f7e36ba9379f..cdb5a191b9d554c165991c9a507c9b8b83d81ac5 100644 (file)
@@ -80,7 +80,7 @@ static const struct insn const insn_table_MM[insn_invalid] = {
        [insn_jr]       = {M(mm_pool32a_op, 0, 0, 0, mm_jalr_op, mm_pool32axf_op), RS},
        [insn_lb]       = {M(mm_lb32_op, 0, 0, 0, 0, 0), RT | RS | SIMM},
        [insn_ld]       = {0, 0},
-       [insn_lh]       = {M(mm_lh32_op, 0, 0, 0, 0, 0), RS | RS | SIMM},
+       [insn_lh]       = {M(mm_lh32_op, 0, 0, 0, 0, 0), RT | RS | SIMM},
        [insn_ll]       = {M(mm_pool32c_op, 0, 0, (mm_ll_func << 1), 0, 0), RS | RT | SIMM},
        [insn_lld]      = {0, 0},
        [insn_lui]      = {M(mm_pool32i_op, mm_lui_op, 0, 0, 0, 0), RS | SIMM},