drm/i915: Add timeline barrier support
authorTvrtko Ursulin <tvrtko.ursulin@intel.com>
Tue, 5 Feb 2019 09:50:30 +0000 (09:50 +0000)
committerTvrtko Ursulin <tvrtko.ursulin@intel.com>
Tue, 5 Feb 2019 11:32:03 +0000 (11:32 +0000)
Timeline barrier allows serialization between different timelines.

After calling i915_timeline_set_barrier with a request, all following
submissions on this timeline will be set up as depending on this request,
or barrier. Once the barrier has been completed it automatically gets
cleared and things continue as normal.

This facility will be used by the upcoming context SSEU code.

v2:
 * Assert barrier has been retired on timeline_fini. (Chris Wilson)
 * Fix mock_timeline.

v3:
 * Improved comment language. (Chris Wilson)

v4:
 * Maintain ordering with previous barriers set on the timeline.

v5:
 * Rebase.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190205095032.22673-3-tvrtko.ursulin@linux.intel.com
drivers/gpu/drm/i915/i915_request.c
drivers/gpu/drm/i915/i915_timeline.c
drivers/gpu/drm/i915/i915_timeline.h
drivers/gpu/drm/i915/selftests/mock_timeline.c

index 9383a9fb48933223e4df0d42075b0b60d9c8fd15..6512630b59b8a4ed47d4e7a3f40dc6b94d9e4c5e 100644 (file)
@@ -526,6 +526,19 @@ out:
        return kmem_cache_alloc(ce->gem_context->i915->requests, GFP_KERNEL);
 }
 
+static int add_barrier(struct i915_request *rq, struct i915_gem_active *active)
+{
+       struct i915_request *barrier =
+               i915_gem_active_raw(active, &rq->i915->drm.struct_mutex);
+
+       return barrier ? i915_request_await_dma_fence(rq, &barrier->fence) : 0;
+}
+
+static int add_timeline_barrier(struct i915_request *rq)
+{
+       return add_barrier(rq, &rq->timeline->barrier);
+}
+
 /**
  * i915_request_alloc - allocate a request structure
  *
@@ -668,6 +681,10 @@ i915_request_alloc(struct intel_engine_cs *engine, struct i915_gem_context *ctx)
         */
        rq->head = rq->ring->emit;
 
+       ret = add_timeline_barrier(rq);
+       if (ret)
+               goto err_unwind;
+
        ret = engine->request_alloc(rq);
        if (ret)
                goto err_unwind;
index 5ea3af393ffe8a33b03c9199371aadea1b50305c..dcff3ae96683ff39a85de22b4145afbc5ed054be 100644 (file)
@@ -163,6 +163,7 @@ int i915_timeline_init(struct drm_i915_private *i915,
 
        spin_lock_init(&timeline->lock);
 
+       init_request_active(&timeline->barrier, NULL);
        init_request_active(&timeline->last_request, NULL);
        INIT_LIST_HEAD(&timeline->requests);
 
@@ -235,6 +236,7 @@ void i915_timeline_fini(struct i915_timeline *timeline)
 {
        GEM_BUG_ON(timeline->pin_count);
        GEM_BUG_ON(!list_empty(&timeline->requests));
+       GEM_BUG_ON(i915_gem_active_isset(&timeline->barrier));
 
        i915_syncmap_free(&timeline->sync);
        hwsp_free(timeline);
@@ -309,6 +311,25 @@ void i915_timeline_unpin(struct i915_timeline *tl)
        __i915_vma_unpin(tl->hwsp_ggtt);
 }
 
+int i915_timeline_set_barrier(struct i915_timeline *tl, struct i915_request *rq)
+{
+       struct i915_request *old;
+       int err;
+
+       lockdep_assert_held(&rq->i915->drm.struct_mutex);
+
+       /* Must maintain ordering wrt existing barriers */
+       old = i915_gem_active_raw(&tl->barrier, &rq->i915->drm.struct_mutex);
+       if (old) {
+               err = i915_request_await_dma_fence(rq, &old->fence);
+               if (err)
+                       return err;
+       }
+
+       i915_gem_active_set(&tl->barrier, rq);
+       return 0;
+}
+
 void __i915_timeline_free(struct kref *kref)
 {
        struct i915_timeline *timeline =
index 8caeb66d1cd554e94a10da9d2ba3cc0c6bd529ad..d167e04073c5cf3400a22e12059675baed8a9d9d 100644 (file)
@@ -74,6 +74,16 @@ struct i915_timeline {
         */
        struct i915_syncmap *sync;
 
+       /**
+        * Barrier provides the ability to serialize ordering between different
+        * timelines.
+        *
+        * Users can call i915_timeline_set_barrier which will make all
+        * subsequent submissions to this timeline be executed only after the
+        * barrier has been completed.
+        */
+       struct i915_gem_active barrier;
+
        struct list_head link;
        const char *name;
        struct drm_i915_private *i915;
@@ -155,4 +165,16 @@ void i915_timelines_init(struct drm_i915_private *i915);
 void i915_timelines_park(struct drm_i915_private *i915);
 void i915_timelines_fini(struct drm_i915_private *i915);
 
+/**
+ * i915_timeline_set_barrier - orders submission between different timelines
+ * @timeline: timeline to set the barrier on
+ * @rq: request after which new submissions can proceed
+ *
+ * Sets the passed in request as the serialization point for all subsequent
+ * submissions on @timeline. Subsequent requests will not be submitted to GPU
+ * until the barrier has been completed.
+ */
+int i915_timeline_set_barrier(struct i915_timeline *timeline,
+                             struct i915_request *rq);
+
 #endif
index cf39ccd9fc05e5b198b09077bd58aea646ffa52b..e5659aaa856db1a0ac4b429a573a4e74c6b5ac22 100644 (file)
@@ -15,6 +15,7 @@ void mock_timeline_init(struct i915_timeline *timeline, u64 context)
 
        spin_lock_init(&timeline->lock);
 
+       init_request_active(&timeline->barrier, NULL);
        init_request_active(&timeline->last_request, NULL);
        INIT_LIST_HEAD(&timeline->requests);