drm/amdgpu: set -ECANCELED when dropping jobs
authorChristian König <christian.koenig@amd.com>
Mon, 9 Oct 2017 13:51:10 +0000 (15:51 +0200)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 19 Oct 2017 19:27:05 +0000 (15:27 -0400)
And return from the wait functions the fence error code.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c

index b355189533d27f10271cd2f6bd9aad7a4a947546..2ae5d523ca105f31176f322a2626533284fe0e9c 100644 (file)
@@ -1298,6 +1298,8 @@ int amdgpu_cs_wait_ioctl(struct drm_device *dev, void *data,
                r = PTR_ERR(fence);
        else if (fence) {
                r = dma_fence_wait_timeout(fence, true, timeout);
+               if (r > 0 && fence->error)
+                       r = fence->error;
                dma_fence_put(fence);
        } else
                r = 1;
@@ -1435,6 +1437,9 @@ static int amdgpu_cs_wait_all_fences(struct amdgpu_device *adev,
 
                if (r == 0)
                        break;
+
+               if (fence->error)
+                       return fence->error;
        }
 
        memset(wait, 0, sizeof(*wait));
@@ -1495,7 +1500,7 @@ out:
        wait->out.status = (r > 0);
        wait->out.first_signaled = first;
        /* set return value 0 to indicate success */
-       r = 0;
+       r = array[first]->error;
 
 err_free_fence_array:
        for (i = 0; i < fence_count; i++)
index 4f2b5acc8743f09f451f5d04ec4fabe9c686453c..a8357885776e15e236a5237ed754d52d46b789e1 100644 (file)
@@ -197,6 +197,7 @@ static struct dma_fence *amdgpu_job_run(struct amd_sched_job *sched_job)
        trace_amdgpu_sched_run_job(job);
        /* skip ib schedule when vram is lost */
        if (job->vram_lost_counter != atomic_read(&adev->vram_lost_counter)) {
+               dma_fence_set_error(&job->base.s_fence->finished, -ECANCELED);
                DRM_ERROR("Skip scheduling IBs!\n");
        } else {
                r = amdgpu_ib_schedule(job->ring, job->num_ibs, job->ibs, job,