mtd: rawnand: Deprecate the dummy_controller field

We try to force NAND controller drivers to properly separate the NAND
controller object from the NAND chip one, so let's deprecate the dummy
controller object embedded in nand_chip to encourage them to create
their own instance.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

diff --git a/drivers/mtd/nand/raw/cafe_nand.c b/drivers/mtd/nand/raw/cafe_nand.c
index a85f5fa5c66d7795caa0ea7380c85ad50c75dcf9..b1c0cd6b49da6344b16b8c97084ef060c162b858 100644 (file)
--- a/drivers/mtd/nand/raw/cafe_nand.c
+++ b/drivers/mtd/nand/raw/cafe_nand.c
@@ -780,7 +780,7 @@ static int cafe_nand_probe(struct pci_dev *pdev,
        cafe->usedma = 0;
 
        /* Scan to find existence of the device */
-       cafe->nand.dummy_controller.ops = &cafe_nand_controller_ops;
+       cafe->nand.legacy.dummy_controller.ops = &cafe_nand_controller_ops;
        err = nand_scan(&cafe->nand, 2);
        if (err)
                goto out_irq;

diff --git a/drivers/mtd/nand/raw/davinci_nand.c b/drivers/mtd/nand/raw/davinci_nand.c
index f430aeb917e84d11ab9a5f41be73b0717936a89e..27bafa5e1ca178672c7692ece9121d5ffce72f49 100644 (file)
--- a/drivers/mtd/nand/raw/davinci_nand.c
+++ b/drivers/mtd/nand/raw/davinci_nand.c
@@ -801,7 +801,7 @@ static int nand_davinci_probe(struct platform_device *pdev)
        spin_unlock_irq(&davinci_nand_lock);
 
        /* Scan to find existence of the device(s) */
-       info->chip.dummy_controller.ops = &davinci_nand_controller_ops;
+       info->chip.legacy.dummy_controller.ops = &davinci_nand_controller_ops;
        ret = nand_scan(&info->chip, pdata->mask_chipsel ? 2 : 1);
        if (ret < 0) {
                dev_dbg(&pdev->dev, "no NAND chip(s) found\n");

diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c
index e1c3099d705ad472575e64bdfa67db121a4bfe95..eebac35304c6f2be99b7f551e5be2dc9b8789480 100644 (file)
--- a/drivers/mtd/nand/raw/denali.c
+++ b/drivers/mtd/nand/raw/denali.c
@@ -1325,7 +1325,7 @@ int denali_init(struct denali_nand_info *denali)
        if (denali->clk_rate && denali->clk_x_rate)
                chip->options |= NAND_KEEP_TIMINGS;
 
-       chip->dummy_controller.ops = &denali_controller_ops;
+       chip->legacy.dummy_controller.ops = &denali_controller_ops;
        ret = nand_scan(chip, denali->max_banks);
        if (ret)
                goto disable_irq;

diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
index 25f9fe79796a931afa98fe18d46b7d97111e791e..ed405c9434fe531a4e961119388dafeb4922b59d 100644 (file)
--- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
+++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
@@ -1931,7 +1931,7 @@ static int gpmi_nand_init(struct gpmi_nand_data *this)
        if (ret)
                goto err_out;
 
-       chip->dummy_controller.ops = &gpmi_nand_controller_ops;
+       chip->legacy.dummy_controller.ops = &gpmi_nand_controller_ops;
        ret = nand_scan(chip, GPMI_IS_MX6(this) ? 2 : 1);
        if (ret)
                goto err_out;

diff --git a/drivers/mtd/nand/raw/hisi504_nand.c b/drivers/mtd/nand/raw/hisi504_nand.c
index e41c13499fd5038d21ee916e44f3280e453a83c3..f3f9aa160cffefecf7d93a2f18f136014596220a 100644 (file)
--- a/drivers/mtd/nand/raw/hisi504_nand.c
+++ b/drivers/mtd/nand/raw/hisi504_nand.c
@@ -799,7 +799,7 @@ static int hisi_nfc_probe(struct platform_device *pdev)
                return ret;
        }
 
-       chip->dummy_controller.ops = &hisi_nfc_controller_ops;
+       chip->legacy.dummy_controller.ops = &hisi_nfc_controller_ops;
        ret = nand_scan(chip, max_chips);
        if (ret)
                return ret;

diff --git a/drivers/mtd/nand/raw/jz4740_nand.c b/drivers/mtd/nand/raw/jz4740_nand.c
index 0bcfdd3d66a89e4f8942b5ef2e7438008ddd5f3a..f92ae5aa2a548939eb5636d12a774158f16ddc16 100644 (file)
--- a/drivers/mtd/nand/raw/jz4740_nand.c
+++ b/drivers/mtd/nand/raw/jz4740_nand.c
@@ -428,7 +428,7 @@ static int jz_nand_probe(struct platform_device *pdev)
        chip->legacy.chip_delay = 50;
        chip->legacy.cmd_ctrl = jz_nand_cmd_ctrl;
        chip->legacy.select_chip = jz_nand_select_chip;
-       chip->dummy_controller.ops = &jz_nand_controller_ops;
+       chip->legacy.dummy_controller.ops = &jz_nand_controller_ops;
 
        if (nand->busy_gpio)
                chip->legacy.dev_ready = jz_nand_dev_ready;

diff --git a/drivers/mtd/nand/raw/lpc32xx_mlc.c b/drivers/mtd/nand/raw/lpc32xx_mlc.c
index abbb655fe154dfc834ea42488d2fba5fd500b073..086964f8d4240e1a3a7d138307678660415a7bf4 100644 (file)
--- a/drivers/mtd/nand/raw/lpc32xx_mlc.c
+++ b/drivers/mtd/nand/raw/lpc32xx_mlc.c
@@ -799,7 +799,7 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
         * Scan to find existence of the device and get the type of NAND device:
         * SMALL block or LARGE block.
         */
-       nand_chip->dummy_controller.ops = &lpc32xx_nand_controller_ops;
+       nand_chip->legacy.dummy_controller.ops = &lpc32xx_nand_controller_ops;
        res = nand_scan(nand_chip, 1);
        if (res)
                goto free_irq;

diff --git a/drivers/mtd/nand/raw/lpc32xx_slc.c b/drivers/mtd/nand/raw/lpc32xx_slc.c
index f2f2cdbb9d04c6ea72ad30c8ea375f2dcff7492a..a2c5fdc875bdecaab413f86b2d5fe80b2fb3a460 100644 (file)
--- a/drivers/mtd/nand/raw/lpc32xx_slc.c
+++ b/drivers/mtd/nand/raw/lpc32xx_slc.c
@@ -924,7 +924,7 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
        }
 
        /* Find NAND device */
-       chip->dummy_controller.ops = &lpc32xx_nand_controller_ops;
+       chip->legacy.dummy_controller.ops = &lpc32xx_nand_controller_ops;
        res = nand_scan(chip, 1);
        if (res)
                goto release_dma;

diff --git a/drivers/mtd/nand/raw/mxc_nand.c b/drivers/mtd/nand/raw/mxc_nand.c
index 9b75d894cb74c6dc0057ce08404a72b45529d5c0..59554c187e01a99e3302497dd86631dcaccb0560 100644 (file)
--- a/drivers/mtd/nand/raw/mxc_nand.c
+++ b/drivers/mtd/nand/raw/mxc_nand.c
@@ -1891,7 +1891,7 @@ static int mxcnd_probe(struct platform_device *pdev)
        }
 
        /* Scan the NAND device */
-       this->dummy_controller.ops = &mxcnd_controller_ops;
+       this->legacy.dummy_controller.ops = &mxcnd_controller_ops;
        err = nand_scan(this, is_imx25_nfc(host) ? 4 : 1);
        if (err)
                goto escan;

diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 3fc5c00f8dba72a94ae6e387535084a568a5dd37..cca4b24d2ffa8e13151b61721053101f2a55644e 100644 (file)
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -4419,9 +4419,9 @@ static void nand_shutdown(struct mtd_info *mtd)
 /* Set default functions */
 static void nand_set_defaults(struct nand_chip *chip)
 {
-       /* If no controller is provided, use the dummy one. */
+       /* If no controller is provided, use the dummy, legacy one. */
        if (!chip->controller) {
-               chip->controller = &chip->dummy_controller;
+               chip->controller = &chip->legacy.dummy_controller;
                nand_controller_init(chip->controller);
        }
 

diff --git a/drivers/mtd/nand/raw/nandsim.c b/drivers/mtd/nand/raw/nandsim.c
index c452819f612372d56ca5b4316d6afe8cbcb73e1d..2b3047d535583d17dd23ed24d0ed6505f1c81038 100644 (file)
--- a/drivers/mtd/nand/raw/nandsim.c
+++ b/drivers/mtd/nand/raw/nandsim.c
@@ -2304,7 +2304,7 @@ static int __init ns_init_module(void)
        if ((retval = parse_gravepages()) != 0)
                goto error;
 
-       chip->dummy_controller.ops = &ns_controller_ops;
+       chip->legacy.dummy_controller.ops = &ns_controller_ops;
        retval = nand_scan(chip, 1);
        if (retval) {
                NS_ERR("Could not scan NAND Simulator device\n");

diff --git a/drivers/mtd/nand/raw/sh_flctl.c b/drivers/mtd/nand/raw/sh_flctl.c
index 7ab50bc6ad3a30b757a1f5df1bcd173b7c5b5258..cf6b1be1cf9c2a95d99699f4ae1633642835e7f4 100644 (file)
--- a/drivers/mtd/nand/raw/sh_flctl.c
+++ b/drivers/mtd/nand/raw/sh_flctl.c
@@ -1183,7 +1183,7 @@ static int flctl_probe(struct platform_device *pdev)
 
        flctl_setup_dma(flctl);
 
-       nand->dummy_controller.ops = &flctl_nand_controller_ops;
+       nand->legacy.dummy_controller.ops = &flctl_nand_controller_ops;
        ret = nand_scan(nand, 1);
        if (ret)
                goto err_chip;

diff --git a/drivers/mtd/nand/raw/sm_common.c b/drivers/mtd/nand/raw/sm_common.c
index 6f063ef576405f089622be656fba11ea3ca86745..409d036858dc0e606ab8dc66807505f78ae952b8 100644 (file)
--- a/drivers/mtd/nand/raw/sm_common.c
+++ b/drivers/mtd/nand/raw/sm_common.c
@@ -194,7 +194,7 @@ int sm_register_device(struct mtd_info *mtd, int smartmedia)
        chip->options |= NAND_SKIP_BBTSCAN;
 
        /* Scan for card properties */
-       chip->dummy_controller.ops = &sm_controller_ops;
+       chip->legacy.dummy_controller.ops = &sm_controller_ops;
        flash_ids = smartmedia ? nand_smartmedia_flash_ids : nand_xd_flash_ids;
        ret = nand_scan_with_ids(chip, 1, flash_ids);
        if (ret)

diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index f50f40643895653e39cd4ee63490381e5658f1fc..33e240acdc6dd4088750cefa3ff212d83109fc8f 100644 (file)
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -941,6 +941,8 @@ static inline void nand_controller_init(struct nand_controller *nfc)
  * @get_features: get the NAND chip features
  * @chip_delay: chip dependent delay for transferring data from array to read
  *             regs (tR).
+ * @dummy_controller: dummy controller implementation for drivers that can
+ *                   only control a single chip
  *
  * If you look at this structure you're already wrong. These fields/hooks are
  * all deprecated.
@@ -966,6 +968,7 @@ struct nand_legacy {
        int (*get_features)(struct nand_chip *chip, int feature_addr,
                            u8 *subfeature_para);
        int chip_delay;
+       struct nand_controller dummy_controller;
 };
 
 /**
@@ -980,8 +983,6 @@ struct nand_legacy {
  *                     setting the read-retry mode. Mostly needed for MLC NAND.
  * @ecc:               [BOARDSPECIFIC] ECC control structure
  * @buf_align:         minimum buffer alignment required by a platform
- * @dummy_controller:  dummy controller implementation for drivers that can
- *                     only control a single chip
  * @state:             [INTERN] the current state of the NAND device
  * @oob_poi:           "poison value buffer," used for laying out OOB data
  *                     before writing
@@ -1094,7 +1095,6 @@ struct nand_chip {
 
        struct nand_ecc_ctrl ecc;
        unsigned long buf_align;
-       struct nand_controller dummy_controller;
 
        uint8_t *bbt;
        struct nand_bbt_descr *bbt_td;