srm/i915/chv: Add Cherryview PCI IDs
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 9 Apr 2014 15:19:04 +0000 (18:19 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Mon, 12 May 2014 17:50:07 +0000 (19:50 +0200)
v2: Update to also fill in the new num_pipes field.

v3: Rebase on top of the pciid extraction.

v4: Switch from info->has*ring to info->ring mask. Also add VEBOX support whiel
at it.

v5: s/CHV_PCI_IDS/CHV_IDS/, and drop the trailing '\'

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_drv.c
include/drm/i915_pciids.h

index 4024e16ae63d570a264d7ecef57776a878d7967a..6868bc0eabd34336fc19095bf568d4bd9e27735a 100644 (file)
@@ -299,6 +299,15 @@ static const struct intel_device_info intel_broadwell_gt3m_info = {
        GEN_DEFAULT_PIPEOFFSETS,
 };
 
+static const struct intel_device_info intel_cherryview_info = {
+       .is_preliminary = 1,
+       .gen = 8, .num_pipes = 2,
+       .need_gfx_hws = 1, .has_hotplug = 1,
+       .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
+       .is_valleyview = 1,
+       .display_mmio_offset = VLV_DISPLAY_BASE,
+};
+
 /*
  * Make sure any device matches here are from most specific to most
  * general.  For example, since the Quanta match is based on the subsystem
@@ -334,7 +343,8 @@ static const struct intel_device_info intel_broadwell_gt3m_info = {
        INTEL_BDW_GT12M_IDS(&intel_broadwell_m_info),   \
        INTEL_BDW_GT12D_IDS(&intel_broadwell_d_info),   \
        INTEL_BDW_GT3M_IDS(&intel_broadwell_gt3m_info), \
-       INTEL_BDW_GT3D_IDS(&intel_broadwell_gt3d_info)
+       INTEL_BDW_GT3D_IDS(&intel_broadwell_gt3d_info), \
+       INTEL_CHV_IDS(&intel_cherryview_info)
 
 static const struct pci_device_id pciidlist[] = {              /* aka */
        INTEL_PCI_IDS,
index 24f3cad045db074fb88cfaf52dbd1a91b866b732..d18f31a77987140bd9d61de3ffdcdf1a6348e30b 100644 (file)
        INTEL_BDW_GT12D_IDS(info), \
        INTEL_BDW_GT3D_IDS(info)
 
+#define INTEL_CHV_IDS(info) \
+       INTEL_VGA_DEVICE(0x22b0, info), \
+       INTEL_VGA_DEVICE(0x22b1, info), \
+       INTEL_VGA_DEVICE(0x22b2, info), \
+       INTEL_VGA_DEVICE(0x22b3, info)
+
 #endif /* _I915_PCIIDS_H */