ARM: tegra: apalis-tk1: Hog group for ethernet, PCIe, reset GPIOs
authorMarcel Ziswiler <marcel.ziswiler@toradex.com>
Sat, 10 Feb 2018 01:38:04 +0000 (02:38 +0100)
committerThierry Reding <treding@nvidia.com>
Thu, 8 Mar 2018 15:15:34 +0000 (16:15 +0100)
The Apalis TK1 module uses some dedicated GPIOs as I210 gigabit Ethernet
controller reset and to control RESET_MOCI aka reset module output
carrier input on MXM3 pin 26. The Apalis Evaluation Board furthermore
uses Apalis GPIO7 on MXM3 pin 15 as reset signal for its PLX PEX 8605
PCIe Switch.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm/boot/dts/tegra124-apalis-eval.dts
arch/arm/boot/dts/tegra124-apalis.dtsi

index af6c566e8ac438a2a87ea8a711996bb040009638..f1010cefb9930de6da7dea165ad271097505c818 100644 (file)
                vin-supply = <&reg_5v0>;
        };
 };
+
+&gpio {
+       /* Apalis GPIO7 MXM3 pin 15 PLX PEX 8605 PCIe Switch Reset */
+       pex_perst_n {
+               gpio-hog;
+               gpios = <TEGRA_GPIO(DD, 1) GPIO_ACTIVE_HIGH>;
+               output-high;
+               line-name = "PEX_PERST_N";
+       };
+};
index 44c31176ce903e000770bb24407082a7a731daae..b7648ce4565d70a0e2b37405ebdd180121c7b2ff 100644 (file)
                };
        };
 };
+
+&gpio {
+       /* I210 Gigabit Ethernet Controller Reset */
+       lan_reset_n {
+               gpio-hog;
+               gpios = <TEGRA_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
+               output-high;
+               line-name = "LAN_RESET_N";
+       };
+
+       /* Control MXM3 pin 26 Reset Module Output Carrier Input */
+       reset_moci_ctrl {
+               gpio-hog;
+               gpios = <TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
+               output-high;
+               line-name = "RESET_MOCI_CTRL";
+       };
+};