The hardware reset value of bit CCM_CLPCR_LPM enables WAIT mode
(WAIT_UNCLOCKED) by default. However this is undesirable because
WAIT mode should only be enabled when there is a driver managing
ARM clock gating. Correct the initial power mode to WAIT_CLOCKED
(disable WAIT mode). While at it, the power mode after resuming
is also set back to WAIT_CLOCKED from STOP_POWER_OFF.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
clk_prepare_enable(clk[clks_init_on[i]]);
+ /* Set initial power mode */
+ imx6q_set_lpm(WAIT_CLOCKED);
+
np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt");
base = of_iomap(np, 0);
WARN_ON(!base);
cpu_suspend(0, imx6q_suspend_finish);
imx_smp_prepare();
imx_gpc_post_resume();
+ imx6q_set_lpm(WAIT_CLOCKED);
break;
default:
return -EINVAL;