drm/i915: Don't enable/unmask flip interrupts

commit fd3a40242e87 ("drm/i915: Rip out legacy page_flip completion/irq
handling") removed the code to hande the flip done/pending interrupts,
but it failed to actually disable/mask those interrupts. Let's do that
now.

Also remove a stale comment that was left behind.

Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170818183705.27850-2-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 91a2c5dbf2daa4b0d04cec73ff5f3457ad996ac6..9b5be5c4bef782bac0d3ba1779e27cf59256f880 100644 (file)
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2925,8 +2925,7 @@ static void vlv_display_irq_postinstall(struct drm_i915_private *dev_priv)
        u32 enable_mask;
        enum pipe pipe;
 
-       pipestat_mask = PLANE_FLIP_DONE_INT_STATUS_VLV |
-                       PIPE_CRC_DONE_INTERRUPT_STATUS;
+       pipestat_mask = PIPE_CRC_DONE_INTERRUPT_STATUS;
 
        i915_enable_pipestat(dev_priv, PIPE_A, PIPE_GMBUS_INTERRUPT_STATUS);
        for_each_pipe(dev_priv, pipe)
@@ -3301,18 +3300,14 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
 
        if (INTEL_GEN(dev_priv) >= 7) {
                display_mask = (DE_MASTER_IRQ_CONTROL | DE_GSE_IVB |
-                               DE_PCH_EVENT_IVB | DE_PLANEC_FLIP_DONE_IVB |
-                               DE_PLANEB_FLIP_DONE_IVB |
-                               DE_PLANEA_FLIP_DONE_IVB | DE_AUX_CHANNEL_A_IVB);
+                               DE_PCH_EVENT_IVB | DE_AUX_CHANNEL_A_IVB);
                extra_mask = (DE_PIPEC_VBLANK_IVB | DE_PIPEB_VBLANK_IVB |
                              DE_PIPEA_VBLANK_IVB | DE_ERR_INT_IVB |
                              DE_DP_A_HOTPLUG_IVB);
        } else {
                display_mask = (DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT |
-                               DE_PLANEA_FLIP_DONE | DE_PLANEB_FLIP_DONE |
-                               DE_AUX_CHANNEL_A |
-                               DE_PIPEB_CRC_DONE | DE_PIPEA_CRC_DONE |
-                               DE_POISON);
+                               DE_AUX_CHANNEL_A | DE_PIPEB_CRC_DONE |
+                               DE_PIPEA_CRC_DONE | DE_POISON);
                extra_mask = (DE_PIPEA_VBLANK | DE_PIPEB_VBLANK | DE_PCU_EVENT |
                              DE_PIPEB_FIFO_UNDERRUN | DE_PIPEA_FIFO_UNDERRUN |
                              DE_DP_A_HOTPLUG);
@@ -3434,15 +3429,13 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
        enum pipe pipe;
 
        if (INTEL_GEN(dev_priv) >= 9) {
-               de_pipe_masked |= GEN9_PIPE_PLANE1_FLIP_DONE |
-                                 GEN9_DE_PIPE_IRQ_FAULT_ERRORS;
+               de_pipe_masked |= GEN9_DE_PIPE_IRQ_FAULT_ERRORS;
                de_port_masked |= GEN9_AUX_CHANNEL_B | GEN9_AUX_CHANNEL_C |
                                  GEN9_AUX_CHANNEL_D;
                if (IS_GEN9_LP(dev_priv))
                        de_port_masked |= BXT_DE_PORT_GMBUS;
        } else {
-               de_pipe_masked |= GEN8_PIPE_PRIMARY_FLIP_DONE |
-                                 GEN8_DE_PIPE_IRQ_FAULT_ERRORS;
+               de_pipe_masked |= GEN8_DE_PIPE_IRQ_FAULT_ERRORS;
        }
 
        de_pipe_enables = de_pipe_masked | GEN8_PIPE_VBLANK |
@@ -3592,9 +3585,7 @@ static int i8xx_irq_postinstall(struct drm_device *dev)
        /* Unmask the interrupts that we always want on. */
        dev_priv->irq_mask =
                ~(I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
-                 I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
-                 I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT |
-                 I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT);
+                 I915_DISPLAY_PIPE_B_EVENT_INTERRUPT);
        I915_WRITE16(IMR, dev_priv->irq_mask);
 
        I915_WRITE16(IER,
@@ -3613,9 +3604,6 @@ static int i8xx_irq_postinstall(struct drm_device *dev)
        return 0;
 }
 
-/*
- * Returns true when a page flip has completed.
- */
 static irqreturn_t i8xx_irq_handler(int irq, void *arg)
 {
        struct drm_device *dev = arg;
@@ -3734,9 +3722,7 @@ static int i915_irq_postinstall(struct drm_device *dev)
        dev_priv->irq_mask =
                ~(I915_ASLE_INTERRUPT |
                  I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
-                 I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
-                 I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT |
-                 I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT);
+                 I915_DISPLAY_PIPE_B_EVENT_INTERRUPT);
 
        enable_mask =
                I915_ASLE_INTERRUPT |
@@ -3921,13 +3907,9 @@ static int i965_irq_postinstall(struct drm_device *dev)
                               I915_DISPLAY_PORT_INTERRUPT |
                               I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
                               I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
-                              I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT |
-                              I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT |
                               I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT);
 
        enable_mask = ~dev_priv->irq_mask;
-       enable_mask &= ~(I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT |
-                        I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT);
        enable_mask |= I915_USER_INTERRUPT;
 
        if (IS_G4X(dev_priv))