All required banks are enabled during boot procedure.
Signed-off-by: Jie Yang <yang.jie@intel.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
}
}
- /* set default power gating mask */
- writel(0x0, sst->addr.pci_cfg + SST_VDRTCTL0);
+ /* set default power gating control, enable power gating control for all blocks. that is,
+ can't be accessed, please enable each block before accessing. */
+ writel(0xffffffff, sst->addr.pci_cfg + SST_VDRTCTL0);
return 0;
}