ARM: ux500: convert timer suspend/resume to clock_event_device
authorStephen Warren <swarren@nvidia.com>
Thu, 8 Nov 2012 00:07:45 +0000 (17:07 -0700)
committerStephen Warren <swarren@nvidia.com>
Mon, 24 Dec 2012 16:36:36 +0000 (09:36 -0700)
Move ux500's timer suspend/resume functions from struct sys_timer
ux500_timer into struct clock_event_device nmdk_clkevt. This
will allow the sys_timer suspend/resume fields to be removed, and
eventually lead to a complete removal of struct sys_timer.

Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
arch/arm/mach-ux500/timer.c
drivers/clocksource/nomadik-mtu.c

index 875309acb02272cf76c405a72a319cf29dc16b6f..46a7244939646d5d4fde41b7777e2db7a97b7981 100644 (file)
@@ -100,13 +100,6 @@ dt_fail:
        ux500_twd_init();
 }
 
-static void ux500_timer_reset(void)
-{
-       nmdk_clkevt_reset();
-       nmdk_clksrc_reset();
-}
-
 struct sys_timer ux500_timer = {
        .init           = ux500_timer_init,
-       .resume         = ux500_timer_reset,
 };
index 8914c3c1c88b08d8c183a23b17f1e2bd1ffb1e06..025afc6dd324949897968f0fac83e1e90eee3d7a 100644 (file)
@@ -134,12 +134,32 @@ static void nmdk_clkevt_mode(enum clock_event_mode mode,
        }
 }
 
+void nmdk_clksrc_reset(void)
+{
+       /* Disable */
+       writel(0, mtu_base + MTU_CR(0));
+
+       /* ClockSource: configure load and background-load, and fire it up */
+       writel(nmdk_cycle, mtu_base + MTU_LR(0));
+       writel(nmdk_cycle, mtu_base + MTU_BGLR(0));
+
+       writel(clk_prescale | MTU_CRn_32BITS | MTU_CRn_ENA,
+              mtu_base + MTU_CR(0));
+}
+
+static void nmdk_clkevt_resume(struct clock_event_device *cedev)
+{
+       nmdk_clkevt_reset();
+       nmdk_clksrc_reset();
+}
+
 static struct clock_event_device nmdk_clkevt = {
        .name           = "mtu_1",
        .features       = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC,
        .rating         = 200,
        .set_mode       = nmdk_clkevt_mode,
        .set_next_event = nmdk_clkevt_next,
+       .resume         = nmdk_clkevt_resume,
 };
 
 /*
@@ -161,19 +181,6 @@ static struct irqaction nmdk_timer_irq = {
        .dev_id         = &nmdk_clkevt,
 };
 
-void nmdk_clksrc_reset(void)
-{
-       /* Disable */
-       writel(0, mtu_base + MTU_CR(0));
-
-       /* ClockSource: configure load and background-load, and fire it up */
-       writel(nmdk_cycle, mtu_base + MTU_LR(0));
-       writel(nmdk_cycle, mtu_base + MTU_BGLR(0));
-
-       writel(clk_prescale | MTU_CRn_32BITS | MTU_CRn_ENA,
-              mtu_base + MTU_CR(0));
-}
-
 void __init nmdk_timer_init(void __iomem *base, int irq)
 {
        unsigned long rate;