drm/amd/pp: Get and save CZ/ST smu version
authorRex Zhu <Rex.Zhu@amd.com>
Thu, 21 Dec 2017 10:38:47 +0000 (18:38 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 27 Dec 2017 16:34:15 +0000 (11:34 -0500)
The smu firmware is loaded by the sbios on APUs, so query it
from the smu and save the smu fw version info that is reported
to userspace.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
drivers/gpu/drm/amd/powerplay/smumgr/cz_smumgr.c

index 13607e28c1c916e7c89cb62e16bad8a9d1c79d45..4466f3535e2d95ffe8e4b2241741f7d795768437 100644 (file)
@@ -801,6 +801,8 @@ static int amdgpu_cgs_get_firmware_info(struct cgs_device *cgs_device,
                                else
                                        strcpy(fw_name, "amdgpu/vega10_smc.bin");
                                break;
+                       case CHIP_CARRIZO:
+                       case CHIP_STONEY:
                        case CHIP_RAVEN:
                                adev->pm.fw_version = info->version;
                                return 0;
index 78ab0556e48f7c0fd2cb316d1ea606e7b802a1ce..4d3aff381bca69c0fc6950b5d621cc13de258ab2 100644 (file)
@@ -709,6 +709,19 @@ static int cz_start_smu(struct pp_hwmgr *hwmgr)
 {
        int ret = 0;
        uint32_t fw_to_check = 0;
+       struct cgs_firmware_info info = {0};
+       uint32_t index = SMN_MP1_SRAM_START_ADDR +
+                        SMU8_FIRMWARE_HEADER_LOCATION +
+                        offsetof(struct SMU8_Firmware_Header, Version);
+
+
+       if (hwmgr == NULL || hwmgr->device == NULL)
+               return -EINVAL;
+
+       cgs_write_register(hwmgr->device, mmMP0PUB_IND_INDEX, index);
+       hwmgr->smu_version = cgs_read_register(hwmgr->device, mmMP0PUB_IND_DATA);
+       info.version = hwmgr->smu_version >> 8;
+       cgs_get_firmware_info(hwmgr->device, CGS_UCODE_ID_SMU, &info);
 
        fw_to_check = UCODE_ID_RLC_G_MASK |
                        UCODE_ID_SDMA0_MASK |