ARM: dts: rockchip: Add SPDIF transceiver for RK3288

Add the SPDIF transceiver controller definition and pin setup for RK3288
SoCs

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index d6c2f91166468d7e862741e0a493fc6ad5a9c175..12ae3450be54f8b9097ead0d859b6822ba573497 100644 (file)
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -744,6 +744,21 @@
                status = "disabled";
        };
 
+       spdif: sound@ff88b0000 {
+               compatible = "rockchip,rk3288-spdif", "rockchip,rk3066-spdif";
+               reg = <0xff8b0000 0x10000>;
+               #sound-dai-cells = <0>;
+               clock-names = "hclk", "mclk";
+               clocks = <&cru HCLK_SPDIF8CH>, <&cru SCLK_SPDIF8CH>;
+               dmas = <&dmac_bus_s 3>;
+               dma-names = "tx";
+               interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&spdif_tx>;
+               rockchip,grf = <&grf>;
+               status = "disabled";
+       };
+
        i2s: i2s@ff890000 {
                compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s";
                reg = <0xff890000 0x10000>;
@@ -1437,5 +1452,11 @@
                                                <4 3 3 &pcfg_pull_none>;
                        };
                };
+
+               spdif {
+                       spdif_tx: spdif-tx {
+                               rockchip,pins = <RK_GPIO6 11 RK_FUNC_1 &pcfg_pull_none>;
+                       };
+               };
        };
 };