drm/nouveau/mc/gt215: define reset masks + intr cleanup
authorBen Skeggs <bskeggs@redhat.com>
Fri, 8 Apr 2016 07:24:40 +0000 (17:24 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Fri, 20 May 2016 04:43:04 +0000 (14:43 +1000)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/include/nvkm/subdev/mc.h
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
drivers/gpu/drm/nouveau/nvkm/subdev/mc/Kbuild
drivers/gpu/drm/nouveau/nvkm/subdev/mc/gt215.c [new file with mode: 0644]

index bd85dc8df2290a03a02620b38b81585df3aa15a0..c481053785faf2f4bd8aa5b8304d0718ac21f0b1 100644 (file)
@@ -17,6 +17,7 @@ int nv04_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
 int nv44_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
 int nv50_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
 int g98_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
+int gt215_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
 int gf100_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
 int gk104_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
 int gk20a_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
index 2c735182cceda19f038b685f8f7523c40b1969b4..0696dcb4dffdbb0879a2188cd877db34e4eaa82b 100644 (file)
@@ -1150,7 +1150,7 @@ nva3_chipset = {
        .gpio = g94_gpio_new,
        .i2c = g94_i2c_new,
        .imem = nv50_instmem_new,
-       .mc = g98_mc_new,
+       .mc = gt215_mc_new,
        .mmu = nv50_mmu_new,
        .mxm = nv50_mxm_new,
        .pci = g94_pci_new,
@@ -1184,7 +1184,7 @@ nva5_chipset = {
        .gpio = g94_gpio_new,
        .i2c = g94_i2c_new,
        .imem = nv50_instmem_new,
-       .mc = g98_mc_new,
+       .mc = gt215_mc_new,
        .mmu = nv50_mmu_new,
        .mxm = nv50_mxm_new,
        .pci = g94_pci_new,
@@ -1217,7 +1217,7 @@ nva8_chipset = {
        .gpio = g94_gpio_new,
        .i2c = g94_i2c_new,
        .imem = nv50_instmem_new,
-       .mc = g98_mc_new,
+       .mc = gt215_mc_new,
        .mmu = nv50_mmu_new,
        .mxm = nv50_mxm_new,
        .pci = g94_pci_new,
@@ -1314,7 +1314,7 @@ nvaf_chipset = {
        .gpio = g94_gpio_new,
        .i2c = g94_i2c_new,
        .imem = nv50_instmem_new,
-       .mc = g98_mc_new,
+       .mc = gt215_mc_new,
        .mmu = nv50_mmu_new,
        .mxm = nv50_mxm_new,
        .pci = g94_pci_new,
index d89da5ea7dd86667c592669ca95eba3a0c6b95aa..10772ea790eda0d8511db8207a51d907651ede2f 100644 (file)
@@ -3,6 +3,7 @@ nvkm-y += nvkm/subdev/mc/nv04.o
 nvkm-y += nvkm/subdev/mc/nv44.o
 nvkm-y += nvkm/subdev/mc/nv50.o
 nvkm-y += nvkm/subdev/mc/g98.o
+nvkm-y += nvkm/subdev/mc/gt215.o
 nvkm-y += nvkm/subdev/mc/gf100.o
 nvkm-y += nvkm/subdev/mc/gk104.o
 nvkm-y += nvkm/subdev/mc/gk20a.o
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gt215.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gt215.c
new file mode 100644 (file)
index 0000000..aad0ba9
--- /dev/null
@@ -0,0 +1,70 @@
+/*
+ * Copyright 2016 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include "priv.h"
+
+static const struct nvkm_mc_map
+gt215_mc_reset[] = {
+       { 0x04008000, NVKM_ENGINE_MSVLD },
+       { 0x01020000, NVKM_ENGINE_MSPDEC },
+       { 0x00802000, NVKM_ENGINE_CE0 },
+       { 0x00400002, NVKM_ENGINE_MSPPP },
+       { 0x00201000, NVKM_ENGINE_GR },
+       { 0x00000100, NVKM_ENGINE_FIFO },
+       {}
+};
+
+static const struct nvkm_mc_map
+gt215_mc_intr[] = {
+       { 0x04000000, NVKM_ENGINE_DISP },
+       { 0x00400000, NVKM_ENGINE_CE0 },
+       { 0x00020000, NVKM_ENGINE_MSPDEC },
+       { 0x00008000, NVKM_ENGINE_MSVLD },
+       { 0x00001000, NVKM_ENGINE_GR },
+       { 0x00000100, NVKM_ENGINE_FIFO },
+       { 0x00000001, NVKM_ENGINE_MSPPP },
+       { 0x00429101, NVKM_SUBDEV_FB },
+       { 0x10000000, NVKM_SUBDEV_BUS },
+       { 0x00200000, NVKM_SUBDEV_GPIO },
+       { 0x00200000, NVKM_SUBDEV_I2C },
+       { 0x00100000, NVKM_SUBDEV_TIMER },
+       { 0x00080000, NVKM_SUBDEV_THERM },
+       { 0x00040000, NVKM_SUBDEV_PMU },
+       {},
+};
+
+static const struct nvkm_mc_func
+gt215_mc = {
+       .init = nv50_mc_init,
+       .intr = gt215_mc_intr,
+       .intr_unarm = nv04_mc_intr_unarm,
+       .intr_rearm = nv04_mc_intr_rearm,
+       .intr_mask = nv04_mc_intr_mask,
+       .reset = gt215_mc_reset,
+};
+
+int
+gt215_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc)
+{
+       return nvkm_mc_new_(&gt215_mc, device, index, pmc);
+}