drm/nouveau/sec2/tu102-: instantiate SEC2 falcon

Required for ACR.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/sec2.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/sec2.h
index 66684456daf70f8e54140165b357adcb23499cd7..c93ad332461a27b3dc0a200c56decfc27ccd374c 100644 (file)
--- a/drivers/gpu/drm/nouveau/include/nvkm/engine/sec2.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/sec2.h
@@ -13,4 +13,5 @@ struct nvkm_sec2 {
 };
 
 int gp102_sec2_new(struct nvkm_device *, int, struct nvkm_sec2 **);
+int tu102_sec2_new(struct nvkm_device *, int, struct nvkm_sec2 **);
 #endif

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
index 8e52f0ec21a0d6168ba98974076f0133f59e0319..7971096b6767466e662f46c8907382c97b718b30 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
@@ -2467,6 +2467,7 @@ nv162_chipset = {
        .dma = gv100_dma_new,
        .fifo = tu102_fifo_new,
        .nvdec[0] = gp102_nvdec_new,
+       .sec2 = tu102_sec2_new,
 };
 
 static const struct nvkm_device_chip
@@ -2501,6 +2502,7 @@ nv164_chipset = {
        .dma = gv100_dma_new,
        .fifo = tu102_fifo_new,
        .nvdec[0] = gp102_nvdec_new,
+       .sec2 = tu102_sec2_new,
 };
 
 static const struct nvkm_device_chip
@@ -2535,6 +2537,7 @@ nv166_chipset = {
        .dma = gv100_dma_new,
        .fifo = tu102_fifo_new,
        .nvdec[0] = gp102_nvdec_new,
+       .sec2 = tu102_sec2_new,
 };
 
 static int

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/Kbuild
index 4b17254cfbd0f23cbf1a616b06605325adec18c8..d9cdea7d935355aa3430d5f67ffe357541fb8f47 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/Kbuild
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/Kbuild
@@ -1,2 +1,3 @@
 nvkm-y += nvkm/engine/sec2/base.o
 nvkm-y += nvkm/engine/sec2/gp102.o
+nvkm-y += nvkm/engine/sec2/tu102.o

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/tu102.c b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/tu102.c
new file mode 100644 (file)
index 0000000..d655576
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/tu102.c
@@ -0,0 +1,33 @@
+/*
+ * Copyright 2019 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "priv.h"
+
+int
+tu102_sec2_new(struct nvkm_device *device, int index,
+              struct nvkm_sec2 **psec2)
+{
+       /* TOP info wasn't updated on Turing to reflect the PRI
+        * address change for some reason.  We override it here.
+        */
+       return nvkm_sec2_new_(device, index, 0x840000, psec2);
+}