drm/amdgpu: Add CG/PG flags for VCN
authorRex Zhu <Rex.Zhu@amd.com>
Wed, 16 May 2018 12:10:25 +0000 (20:10 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 24 May 2018 05:16:57 +0000 (00:16 -0500)
Define new clock and powergating flags for VCN block.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/include/amd_shared.h

index 33de33016bda16da40728194e7f28ec2435a5642..b178176b72ac66202d79e271b1fd058ef8d45671 100644 (file)
@@ -92,7 +92,7 @@ enum amd_powergating_state {
 #define AMD_CG_SUPPORT_GFX_3D_CGLS             (1 << 21)
 #define AMD_CG_SUPPORT_DRM_MGCG                        (1 << 22)
 #define AMD_CG_SUPPORT_DF_MGCG                 (1 << 23)
-
+#define AMD_CG_SUPPORT_VCN_MGCG                        (1 << 24)
 /* PG flags */
 #define AMD_PG_SUPPORT_GFX_PG                  (1 << 0)
 #define AMD_PG_SUPPORT_GFX_SMG                 (1 << 1)
@@ -108,6 +108,7 @@ enum amd_powergating_state {
 #define AMD_PG_SUPPORT_GFX_QUICK_MG            (1 << 11)
 #define AMD_PG_SUPPORT_GFX_PIPELINE            (1 << 12)
 #define AMD_PG_SUPPORT_MMHUB                   (1 << 13)
+#define AMD_PG_SUPPORT_VCN                     (1 << 14)
 
 enum PP_FEATURE_MASK {
        PP_SCLK_DPM_MASK = 0x1,