cpufreq: x86: Disable interrupts during MSRs reading
authorDoug Smythies <doug.smythies@gmail.com>
Tue, 8 Aug 2017 21:12:49 +0000 (14:12 -0700)
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>
Thu, 10 Aug 2017 23:27:41 +0000 (01:27 +0200)
According to Intel 64 and IA-32 Architectures SDM, Volume 3,
Chapter 14.2, "Software needs to exercise care to avoid delays
between the two RDMSRs (for example interrupts)".

So, disable interrupts during reading MSRs IA32_APERF and IA32_MPERF.

See also: commit 4ab60c3f32c7 (cpufreq: intel_pstate: Disable
interrupts during MSRs reading).

Signed-off-by: Doug Smythies <dsmythies@telus.net>
Reviewed-by: Len Brown <len.brown@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
arch/x86/kernel/cpu/aperfmperf.c

index 7cf7c70b6ef2a20483361fb8333a85ace25bf1d7..0ee83321a3136fcca7a00a3b7e6c375e7a51e13f 100644 (file)
@@ -40,13 +40,16 @@ static void aperfmperf_snapshot_khz(void *dummy)
        struct aperfmperf_sample *s = this_cpu_ptr(&samples);
        ktime_t now = ktime_get();
        s64 time_delta = ktime_ms_delta(now, s->time);
+       unsigned long flags;
 
        /* Don't bother re-computing within the cache threshold time. */
        if (time_delta < APERFMPERF_CACHE_THRESHOLD_MS)
                return;
 
+       local_irq_save(flags);
        rdmsrl(MSR_IA32_APERF, aperf);
        rdmsrl(MSR_IA32_MPERF, mperf);
+       local_irq_restore(flags);
 
        aperf_delta = aperf - s->aperf;
        mperf_delta = mperf - s->mperf;