mmc: omap_hsmmc: Fix UHS card with DDR50 support
authorUlf Hansson <ulf.hansson@linaro.org>
Tue, 25 Nov 2014 12:05:13 +0000 (13:05 +0100)
committerUlf Hansson <ulf.hansson@linaro.org>
Wed, 26 Nov 2014 13:40:39 +0000 (14:40 +0100)
The commit, mmc: omap: clarify DDR timing mode between SD-UHS and eMMC,
switched omap_hsmmc to support MMC DDR mode instead of UHS DDR50 mode.

Add UHS DDR50 mode again and this time let's also keep the MMC DDR mode.

Fixes: 5438ad95a57c (mmc: omap: clarify DDR timing mode between SD-UHS and eMMC)
Reported-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/omap_hsmmc.c

index 82b40b85293fd2110ff04a6933a5044ac0f3c3e2..7c71dcdcba8bdc4d5e59ff124e9f793f1dbf296d 100644 (file)
@@ -628,6 +628,7 @@ static void omap_hsmmc_set_clock(struct omap_hsmmc_host *host)
         */
        if ((mmc_pdata(host)->features & HSMMC_HAS_HSPE_SUPPORT) &&
            (ios->timing != MMC_TIMING_MMC_DDR52) &&
+           (ios->timing != MMC_TIMING_UHS_DDR50) &&
            ((OMAP_HSMMC_READ(host->base, CAPA) & HSS) == HSS)) {
                regval = OMAP_HSMMC_READ(host->base, HCTL);
                if (clkdiv && (clk_get_rate(host->fclk)/clkdiv) > 25000000)
@@ -647,7 +648,8 @@ static void omap_hsmmc_set_bus_width(struct omap_hsmmc_host *host)
        u32 con;
 
        con = OMAP_HSMMC_READ(host->base, CON);
-       if (ios->timing == MMC_TIMING_MMC_DDR52)
+       if (ios->timing == MMC_TIMING_MMC_DDR52 ||
+           ios->timing == MMC_TIMING_UHS_DDR50)
                con |= DDR;     /* configure in DDR mode */
        else
                con &= ~DDR;