staging: gasket: apex_clock_gating simplify logic, reduce indentation

Collapse together two checks and return immediately, avoid conditional
indentation for most of function code.

Reported-by: Guenter Roeck <groeck@chromium.org>
Signed-off-by: Simon Que <sque@chromium.org>
Signed-off-by: Todd Poynor <toddpoynor@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/staging/gasket/apex_driver.c b/drivers/staging/gasket/apex_driver.c
index 3a83c3d4d55617e6d68cde6f7fa2f70c36af7766..a01b1f2b827ea2e7fc1b74fcb84cf638e07a4486 100644 (file)
--- a/drivers/staging/gasket/apex_driver.c
+++ b/drivers/staging/gasket/apex_driver.c
@@ -666,33 +666,30 @@ static long apex_clock_gating(struct gasket_dev *gasket_dev, ulong arg)
 {
        struct apex_gate_clock_ioctl ibuf;
 
-       if (bypass_top_level)
+       if (bypass_top_level || !allow_sw_clock_gating)
                return 0;
 
-       if (allow_sw_clock_gating) {
-               if (copy_from_user(&ibuf, (void __user *)arg, sizeof(ibuf)))
-                       return -EFAULT;
+       if (copy_from_user(&ibuf, (void __user *)arg, sizeof(ibuf)))
+               return -EFAULT;
 
-               gasket_log_error(
-                       gasket_dev, "%s %llu", __func__, ibuf.enable);
+       gasket_log_error(gasket_dev, "%s %llu", __func__, ibuf.enable);
 
-               if (ibuf.enable) {
-                       /* Quiesce AXI, gate GCB clock. */
-                       gasket_read_modify_write_32(
-                               gasket_dev, APEX_BAR_INDEX,
-                               APEX_BAR2_REG_AXI_QUIESCE, 0x1, 1, 16);
-                       gasket_read_modify_write_32(
-                               gasket_dev, APEX_BAR_INDEX,
-                               APEX_BAR2_REG_GCB_CLOCK_GATE, 0x1, 2, 18);
-               } else {
-                       /* Un-gate GCB clock, un-quiesce AXI. */
-                       gasket_read_modify_write_32(
-                               gasket_dev, APEX_BAR_INDEX,
-                               APEX_BAR2_REG_GCB_CLOCK_GATE, 0x0, 2, 18);
-                       gasket_read_modify_write_32(
-                               gasket_dev, APEX_BAR_INDEX,
-                               APEX_BAR2_REG_AXI_QUIESCE, 0x0, 1, 16);
-               }
+       if (ibuf.enable) {
+               /* Quiesce AXI, gate GCB clock. */
+               gasket_read_modify_write_32(
+                   gasket_dev, APEX_BAR_INDEX,
+                   APEX_BAR2_REG_AXI_QUIESCE, 0x1, 1, 16);
+               gasket_read_modify_write_32(
+                   gasket_dev, APEX_BAR_INDEX,
+                   APEX_BAR2_REG_GCB_CLOCK_GATE, 0x1, 2, 18);
+       } else {
+               /* Un-gate GCB clock, un-quiesce AXI. */
+               gasket_read_modify_write_32(
+                   gasket_dev, APEX_BAR_INDEX,
+                   APEX_BAR2_REG_GCB_CLOCK_GATE, 0x0, 2, 18);
+               gasket_read_modify_write_32(
+                   gasket_dev, APEX_BAR_INDEX,
+                   APEX_BAR2_REG_AXI_QUIESCE, 0x0, 1, 16);
        }
        return 0;
 }