#ifdef BCMDBG
-#define WL_ERROR(args) do {if ((wl_msg_level & WL_ERROR_VAL)) WL_PRINT(args);} while (0)
-#define WL_TRACE(args) do {if (wl_msg_level & WL_TRACE_VAL) WL_PRINT(args);} while (0)
-#define WL_AMPDU(args) do {if (wl_msg_level & WL_AMPDU_VAL) WL_PRINT(args);} while (0)
-#define WL_FFPLD(args) do {if (wl_msg_level & WL_FFPLD_VAL) WL_PRINT(args);} while (0)
+#define WL_ERROR(args) do {if ((wl_msg_level & WL_ERROR_VAL)) WL_PRINT(args); } while (0)
+#define WL_TRACE(args) do {if (wl_msg_level & WL_TRACE_VAL) WL_PRINT(args); } while (0)
+#define WL_AMPDU(args) do {if (wl_msg_level & WL_AMPDU_VAL) WL_PRINT(args); } while (0)
+#define WL_FFPLD(args) do {if (wl_msg_level & WL_FFPLD_VAL) WL_PRINT(args); } while (0)
#define WL_ERROR_ON() (wl_msg_level & WL_ERROR_VAL)
extern uint32 wl_ampdu_dbg;
-#define WL_AMPDU_UPDN(args) do {if (wl_ampdu_dbg & WL_AMPDU_UPDN_VAL) {WL_AMPDU(args);} } while (0)
-#define WL_AMPDU_RX(args) do {if (wl_ampdu_dbg & WL_AMPDU_RX_VAL) {WL_AMPDU(args);} } while (0)
-#define WL_AMPDU_ERR(args) do {if (wl_ampdu_dbg & WL_AMPDU_ERR_VAL) {WL_AMPDU(args);} } while (0)
-#define WL_AMPDU_TX(args) do {if (wl_ampdu_dbg & WL_AMPDU_TX_VAL) {WL_AMPDU(args);} } while (0)
-#define WL_AMPDU_CTL(args) do {if (wl_ampdu_dbg & WL_AMPDU_CTL_VAL) {WL_AMPDU(args);} } while (0)
-#define WL_AMPDU_HW(args) do {if (wl_ampdu_dbg & WL_AMPDU_HW_VAL) {WL_AMPDU(args);} } while (0)
-#define WL_AMPDU_HWTXS(args) do {if (wl_ampdu_dbg & WL_AMPDU_HWTXS_VAL) {WL_AMPDU(args);} } while (0)
-#define WL_AMPDU_HWDBG(args) do {if (wl_ampdu_dbg & WL_AMPDU_HWDBG_VAL) {WL_AMPDU(args);} } while (0)
+#define WL_AMPDU_UPDN(args) do {if (wl_ampdu_dbg & WL_AMPDU_UPDN_VAL) {WL_AMPDU(args); } } while (0)
+#define WL_AMPDU_RX(args) do {if (wl_ampdu_dbg & WL_AMPDU_RX_VAL) {WL_AMPDU(args); } } while (0)
+#define WL_AMPDU_ERR(args) do {if (wl_ampdu_dbg & WL_AMPDU_ERR_VAL) {WL_AMPDU(args); } } while (0)
+#define WL_AMPDU_TX(args) do {if (wl_ampdu_dbg & WL_AMPDU_TX_VAL) {WL_AMPDU(args); } } while (0)
+#define WL_AMPDU_CTL(args) do {if (wl_ampdu_dbg & WL_AMPDU_CTL_VAL) {WL_AMPDU(args); } } while (0)
+#define WL_AMPDU_HW(args) do {if (wl_ampdu_dbg & WL_AMPDU_HW_VAL) {WL_AMPDU(args); } } while (0)
+#define WL_AMPDU_HWTXS(args) do {if (wl_ampdu_dbg & WL_AMPDU_HWTXS_VAL) {WL_AMPDU(args); } } while (0)
+#define WL_AMPDU_HWDBG(args) do {if (wl_ampdu_dbg & WL_AMPDU_HWDBG_VAL) {WL_AMPDU(args); } } while (0)
#define WL_AMPDU_ERR_ON() (wl_ampdu_dbg & WL_AMPDU_ERR_VAL)
#define WL_AMPDU_HW_ON() (wl_ampdu_dbg & WL_AMPDU_HW_VAL)
#define WL_AMPDU_HWTXS_ON() (wl_ampdu_dbg & WL_AMPDU_HWTXS_VAL)
#define WL_UNLOCK(wl) spin_unlock_bh(&(wl)->lock)
/* locking from inside wl_isr */
-#define WL_ISRLOCK(wl, flags) do {spin_lock(&(wl)->isr_lock); (void)(flags);} while (0)
-#define WL_ISRUNLOCK(wl, flags) do {spin_unlock(&(wl)->isr_lock); (void)(flags);} while (0)
+#define WL_ISRLOCK(wl, flags) do {spin_lock(&(wl)->isr_lock); (void)(flags); } while (0)
+#define WL_ISRUNLOCK(wl, flags) do {spin_unlock(&(wl)->isr_lock); (void)(flags); } while (0)
/* locking under WL_LOCK() to synchronize with wl_isr */
#define INT_LOCK(wl, flags) spin_lock_irqsave(&(wl)->isr_lock, flags)
#define wlc_key_hw_wowl_init(a, b, c, d) do {} while (0)
#define wlc_key_sw_wowl_update(a, b, c, d, e) do {} while (0)
#define wlc_key_sw_wowl_create(a, b, c) (BCME_ERROR)
-#define wlc_key_iv_update(a, b, c, d, e) do {(void)e;} while (0)
+#define wlc_key_iv_update(a, b, c, d, e) do {(void)e; } while (0)
#define wlc_key_iv_init(a, b, c) do {} while (0)
#define wlc_key_set_error(a, b, c) (BCME_ERROR)
#define wlc_key_dump_hw(a, b) (BCME_ERROR)
#define WLC_UPDATE_STATS(wlc) 0 /* No stats support */
#define WLCNTINCR(a) /* No stats support */
#define WLCNTDECR(a) /* No stats support */
-#define WLCNTADD(a,delta) /* No stats support */
-#define WLCNTSET(a,value) /* No stats support */
+#define WLCNTADD(a, delta) /* No stats support */
+#define WLCNTSET(a, value) /* No stats support */
#define WLCNTVAL(a) 0 /* No stats support */
/* common functions for every port */
#define WLCNTSCBINCR(a) /* No stats support */
#define WLCNTSCBDECR(a) /* No stats support */
-#define WLCNTSCBADD(a,delta) /* No stats support */
-#define WLCNTSCBSET(a,value) /* No stats support */
+#define WLCNTSCBADD(a, delta) /* No stats support */
+#define WLCNTSCBSET(a, value) /* No stats support */
#define WLCNTSCBVAL(a) 0 /* No stats support */
#define WLCNTSCB_COND_SET(c, a, v) /* No stats support */
#define WLCNTSCB_COND_ADD(c, a, d) /* No stats support */
#define OTPGU_P_SHIFT (OTPGU_HWP_OFF % 16)
/* OTP Size */
-#define OTP_SZ_FU_324 ((ROUNDUP(324,8))/8) /* 324 bits */
+#define OTP_SZ_FU_324 ((ROUNDUP(324, 8))/8) /* 324 bits */
#define OTP_SZ_FU_288 (288/8) /* 288 bits */
#define OTP_SZ_FU_216 (216/8) /* 216 bits */
#define OTP_SZ_FU_72 (72/8) /* 72 bits */
4, 0x2}, {
2, 0x3}, {
1, 0x0}, {
-0, 0x0} };
+ 0, 0x0}
+ };
/* SDIO Drive Strength to sel value table for PMU Rev 2, 3 */
static const sdiod_drive_str_t BCMINITDATA(sdiod_drive_strength_tab2)[] = {
6, 0x4}, {
4, 0x2}, {
2, 0x1}, {
-0, 0x0} };
+ 0, 0x0}
+ };
/* SDIO Drive Strength to sel value table for PMU Rev 8 (1.8V) */
static const sdiod_drive_str_t BCMINITDATA(sdiod_drive_strength_tab3)[] = {
12, 0x3}, {
8, 0x2}, {
4, 0x1}, {
-0, 0x0} };
+ 0, 0x0}
+ };
#define SDIOD_DRVSTR_KEY(chip, pmu) (((chip) << 16) | (pmu))