drm/amd/powerplay: allow slow switch only if NBPState enabled v2

Otherwise there may be potential SMU performance issues.

v2: fix commit description and coding style

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Rex Zhu <rex.zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
index 9f5ceee0fa63813ebcf8269b16eeb83a1e649559..fb86c24394ff463f3ee565125d72e27434889038 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
@@ -3801,7 +3801,8 @@ static int vega10_notify_smc_display_config_after_ps_adjustment(
        struct pp_display_clock_request clock_req;
 
        if ((hwmgr->display_config->num_display > 1) &&
-            !hwmgr->display_config->multi_monitor_in_sync)
+            !hwmgr->display_config->multi_monitor_in_sync &&
+            !hwmgr->display_config->nb_pstate_switch_disable)
                vega10_notify_smc_display_change(hwmgr, false);
        else
                vega10_notify_smc_display_change(hwmgr, true);

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
index 35f96dacb50a2e1a67a4f9471cddd8a7108dcda1..0789d64246ca5dd0567fba6655fe4c5e5684e58c 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
@@ -1389,7 +1389,8 @@ static int vega12_notify_smc_display_config_after_ps_adjustment(
        struct pp_display_clock_request clock_req;
 
        if ((hwmgr->display_config->num_display > 1) &&
-               !hwmgr->display_config->multi_monitor_in_sync)
+            !hwmgr->display_config->multi_monitor_in_sync &&
+            !hwmgr->display_config->nb_pstate_switch_disable)
                vega12_notify_smc_display_change(hwmgr, false);
        else
                vega12_notify_smc_display_change(hwmgr, true);