ARM: imx: add mmdc ipg clock operation for mmdc
authorAnson Huang <Anson.Huang@nxp.com>
Fri, 31 Aug 2018 07:53:12 +0000 (15:53 +0800)
committerShawn Guo <shawnguo@kernel.org>
Mon, 10 Sep 2018 00:17:04 +0000 (08:17 +0800)
i.MX6 SoCs have MMDC ipg clock for registers access, to make
sure MMDC registers access successfully, add optional clock
enable for MMDC driver.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm/mach-imx/mmdc.c

index 04b3bf71de94ba7d24ae0561d2dfab62db189163..e49e068345162ba77d77ae36dbef324c446ef862 100644 (file)
@@ -11,6 +11,7 @@
  * http://www.gnu.org/copyleft/gpl.html
  */
 
+#include <linux/clk.h>
 #include <linux/hrtimer.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
@@ -546,7 +547,20 @@ static int imx_mmdc_probe(struct platform_device *pdev)
 {
        struct device_node *np = pdev->dev.of_node;
        void __iomem *mmdc_base, *reg;
+       struct clk *mmdc_ipg_clk;
        u32 val;
+       int err;
+
+       /* the ipg clock is optional */
+       mmdc_ipg_clk = devm_clk_get(&pdev->dev, NULL);
+       if (IS_ERR(mmdc_ipg_clk))
+               mmdc_ipg_clk = NULL;
+
+       err = clk_prepare_enable(mmdc_ipg_clk);
+       if (err) {
+               dev_err(&pdev->dev, "Unable to enable mmdc ipg clock.\n");
+               return err;
+       }
 
        mmdc_base = of_iomap(np, 0);
        WARN_ON(!mmdc_base);