PCI: designware-ep: Make dw_pcie_ep_reset_bar() handle 64-bit BARs properly

Since a 64-bit BAR consists of a BAR pair, we need to write to both
BARs in the BAR pair to clear the BAR properly.

Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>

diff --git a/drivers/pci/dwc/pcie-designware-ep.c b/drivers/pci/dwc/pcie-designware-ep.c
index c9bdb5f139b4b56fbefc48ae813d4581404a53fc..9164c9084b4e08040177147a988c9b160bd1a2ef 100644 (file)
--- a/drivers/pci/dwc/pcie-designware-ep.c
+++ b/drivers/pci/dwc/pcie-designware-ep.c
@@ -28,6 +28,10 @@ static void __dw_pcie_ep_reset_bar(struct dw_pcie *pci, enum pci_barno bar,
        dw_pcie_dbi_ro_wr_en(pci);
        dw_pcie_writel_dbi2(pci, reg, 0x0);
        dw_pcie_writel_dbi(pci, reg, 0x0);
+       if (flags & PCI_BASE_ADDRESS_MEM_TYPE_64) {
+               dw_pcie_writel_dbi2(pci, reg + 4, 0x0);
+               dw_pcie_writel_dbi(pci, reg + 4, 0x0);
+       }
        dw_pcie_dbi_ro_wr_dis(pci);
 }