int nr_src, nr_dst, n_cdesc = 0, n_rdesc = 0, queued = req->cryptlen;
int i, ret = 0;
- request->req = &req->base;
-
if (req->src == req->dst) {
nr_src = dma_map_sg(priv->dev, req->src,
sg_nents_for_len(req->src, req->cryptlen),
n_rdesc++;
}
- ctx->base.handle_result = safexcel_handle_result;
-
spin_unlock_bh(&priv->ring[ring].egress_lock);
+ request->req = &req->base;
+ ctx->base.handle_result = safexcel_handle_result;
+
*commands = n_cdesc;
*results = n_rdesc;
return 0;
len -= extra;
}
- request->req = &areq->base;
- ctx->base.handle_result = safexcel_handle_result;
-
spin_lock_bh(&priv->ring[ring].egress_lock);
/* Add a command descriptor for the cached data, if any */
goto cdesc_rollback;
}
- req->processed += len;
spin_unlock_bh(&priv->ring[ring].egress_lock);
+ req->processed += len;
+ request->req = &areq->base;
+ ctx->base.handle_result = safexcel_handle_result;
+
*commands = n_cdesc;
*results = 1;
return 0;