SNDRV_PCM_FMTBIT_S16_LE | \
SNDRV_PCM_FMTBIT_S20_LE | \
SNDRV_PCM_FMTBIT_S24_LE | \
- SNDRV_PCM_FMTBIT_S32_LE)
+ SNDRV_PCM_FMTBIT_S32_LE | \
+ SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE)
#define AXG_FIFO_BURST 8
#define AXG_FIFO_MIN_CNT 64
#define CTRL0_TODDR_LSB_POS_MASK GENMASK(7, 3)
#define CTRL0_TODDR_LSB_POS(x) ((x) << 3)
+#define TODDR_MSB_POS 31
+
static int axg_toddr_pcm_new(struct snd_soc_pcm_runtime *rtd,
struct snd_soc_dai *dai)
{
struct snd_soc_dai *dai)
{
struct axg_fifo *fifo = snd_soc_dai_get_drvdata(dai);
- unsigned int type, width, msb = 31;
-
- /*
- * NOTE:
- * Almost all backend will place the MSB at bit 31, except SPDIF Input
- * which will put it at index 28. When adding support for the SPDIF
- * Input, we'll need to find which type of backend we are connected to.
- */
+ unsigned int type, width;
switch (params_physical_width(params)) {
case 8:
CTRL0_TODDR_MSB_POS_MASK |
CTRL0_TODDR_LSB_POS_MASK,
CTRL0_TODDR_TYPE(type) |
- CTRL0_TODDR_MSB_POS(msb) |
- CTRL0_TODDR_LSB_POS(msb - (width - 1)));
+ CTRL0_TODDR_MSB_POS(TODDR_MSB_POS) |
+ CTRL0_TODDR_LSB_POS(TODDR_MSB_POS - (width - 1)));
return 0;
}